Loading arch/mips/Kconfig +1 −0 Original line number Diff line number Diff line Loading @@ -133,6 +133,7 @@ config LASAT select DMA_NONCOHERENT select SYS_HAS_EARLY_PRINTK select HW_HAS_PCI select IRQ_CPU select PCI_GT64XXX_PCI0 select MIPS_NILE4 select R5000_CPU_SCACHE Loading arch/mips/lasat/interrupt.c +5 −3 Original line number Diff line number Diff line Loading @@ -26,6 +26,7 @@ #include <linux/kernel_stat.h> #include <asm/bootinfo.h> #include <asm/irq_cpu.h> #include <asm/lasat/lasatint.h> #include <asm/time.h> #include <asm/gdb-stub.h> Loading Loading @@ -88,7 +89,7 @@ asmlinkage void plat_irq_dispatch(void) int irq; if (cause & CAUSEF_IP7) { /* R4000 count / compare IRQ */ ll_timer_interrupt(7); do_IRQ(7); return; } Loading @@ -96,7 +97,7 @@ asmlinkage void plat_irq_dispatch(void) /* if int_status == 0, then the interrupt has already been cleared */ if (int_status) { irq = ls1bit32(int_status); irq = LASATINT_BASE + ls1bit32(int_status); do_IRQ(irq); } Loading Loading @@ -125,6 +126,7 @@ void __init arch_init_irq(void) panic("arch_init_irq: mips_machtype incorrect"); } for (i = 0; i <= LASATINT_END; i++) mips_cpu_irq_init(); for (i = LASATINT_BASE; i <= LASATINT_END; i++) set_irq_chip_and_handler(i, &lasat_irq_type, handle_level_irq); } arch/mips/pci/pci-lasat.c +10 −9 Original line number Diff line number Diff line Loading @@ -10,6 +10,7 @@ #include <linux/pci.h> #include <linux/types.h> #include <asm/bootinfo.h> #include <asm/lasat/lasatint.h> extern struct pci_ops nile4_pci_ops; extern struct pci_ops gt64xxx_pci0_ops; Loading Loading @@ -54,15 +55,15 @@ static int __init lasat_pci_setup(void) arch_initcall(lasat_pci_setup); #define LASATINT_ETH1 0 #define LASATINT_ETH0 1 #define LASATINT_HDC 2 #define LASATINT_COMP 3 #define LASATINT_HDLC 4 #define LASATINT_PCIA 5 #define LASATINT_PCIB 6 #define LASATINT_PCIC 7 #define LASATINT_PCID 8 #define LASATINT_ETH1 (LASATINT_BASE + 0) #define LASATINT_ETH0 (LASATINT_BASE + 1) #define LASATINT_HDC (LASATINT_BASE + 2) #define LASATINT_COMP (LASATINT_BASE + 3) #define LASATINT_HDLC (LASATINT_BASE + 4) #define LASATINT_PCIA (LASATINT_BASE + 5) #define LASATINT_PCIB (LASATINT_BASE + 6) #define LASATINT_PCIC (LASATINT_BASE + 7) #define LASATINT_PCID (LASATINT_BASE + 8) int __init pcibios_map_irq(const struct pci_dev *dev, u8 slot, u8 pin) { Loading include/asm-mips/lasat/lasatint.h +4 −1 Original line number Diff line number Diff line #ifndef __ASM_LASAT_LASATINT_H #define __ASM_LASAT_LASATINT_H #define LASATINT_END 16 #include <linux/irq.h> #define LASATINT_BASE MIPS_CPU_IRQ_BASE #define LASATINT_END (LASATINT_BASE + 16) /* lasat 100 */ #define LASAT_INT_STATUS_REG_100 (KSEG1ADDR(0x1c880000)) Loading Loading
arch/mips/Kconfig +1 −0 Original line number Diff line number Diff line Loading @@ -133,6 +133,7 @@ config LASAT select DMA_NONCOHERENT select SYS_HAS_EARLY_PRINTK select HW_HAS_PCI select IRQ_CPU select PCI_GT64XXX_PCI0 select MIPS_NILE4 select R5000_CPU_SCACHE Loading
arch/mips/lasat/interrupt.c +5 −3 Original line number Diff line number Diff line Loading @@ -26,6 +26,7 @@ #include <linux/kernel_stat.h> #include <asm/bootinfo.h> #include <asm/irq_cpu.h> #include <asm/lasat/lasatint.h> #include <asm/time.h> #include <asm/gdb-stub.h> Loading Loading @@ -88,7 +89,7 @@ asmlinkage void plat_irq_dispatch(void) int irq; if (cause & CAUSEF_IP7) { /* R4000 count / compare IRQ */ ll_timer_interrupt(7); do_IRQ(7); return; } Loading @@ -96,7 +97,7 @@ asmlinkage void plat_irq_dispatch(void) /* if int_status == 0, then the interrupt has already been cleared */ if (int_status) { irq = ls1bit32(int_status); irq = LASATINT_BASE + ls1bit32(int_status); do_IRQ(irq); } Loading Loading @@ -125,6 +126,7 @@ void __init arch_init_irq(void) panic("arch_init_irq: mips_machtype incorrect"); } for (i = 0; i <= LASATINT_END; i++) mips_cpu_irq_init(); for (i = LASATINT_BASE; i <= LASATINT_END; i++) set_irq_chip_and_handler(i, &lasat_irq_type, handle_level_irq); }
arch/mips/pci/pci-lasat.c +10 −9 Original line number Diff line number Diff line Loading @@ -10,6 +10,7 @@ #include <linux/pci.h> #include <linux/types.h> #include <asm/bootinfo.h> #include <asm/lasat/lasatint.h> extern struct pci_ops nile4_pci_ops; extern struct pci_ops gt64xxx_pci0_ops; Loading Loading @@ -54,15 +55,15 @@ static int __init lasat_pci_setup(void) arch_initcall(lasat_pci_setup); #define LASATINT_ETH1 0 #define LASATINT_ETH0 1 #define LASATINT_HDC 2 #define LASATINT_COMP 3 #define LASATINT_HDLC 4 #define LASATINT_PCIA 5 #define LASATINT_PCIB 6 #define LASATINT_PCIC 7 #define LASATINT_PCID 8 #define LASATINT_ETH1 (LASATINT_BASE + 0) #define LASATINT_ETH0 (LASATINT_BASE + 1) #define LASATINT_HDC (LASATINT_BASE + 2) #define LASATINT_COMP (LASATINT_BASE + 3) #define LASATINT_HDLC (LASATINT_BASE + 4) #define LASATINT_PCIA (LASATINT_BASE + 5) #define LASATINT_PCIB (LASATINT_BASE + 6) #define LASATINT_PCIC (LASATINT_BASE + 7) #define LASATINT_PCID (LASATINT_BASE + 8) int __init pcibios_map_irq(const struct pci_dev *dev, u8 slot, u8 pin) { Loading
include/asm-mips/lasat/lasatint.h +4 −1 Original line number Diff line number Diff line #ifndef __ASM_LASAT_LASATINT_H #define __ASM_LASAT_LASATINT_H #define LASATINT_END 16 #include <linux/irq.h> #define LASATINT_BASE MIPS_CPU_IRQ_BASE #define LASATINT_END (LASATINT_BASE + 16) /* lasat 100 */ #define LASAT_INT_STATUS_REG_100 (KSEG1ADDR(0x1c880000)) Loading