Donate to e Foundation | Murena handsets with /e/OS | Own a part of Murena! Learn more

Commit a58caad1 authored by Tony Lindgren's avatar Tony Lindgren
Browse files

ARM: OMAP: Introduce omap_globals and prcm access functions for multi-omap 



New struct omap_globals contains the omap processor specific
module bases. Use omap_globals to set the various base addresses
to make detecting omap chip type simpler.

Also introduce OMAP1_IO_ADDRESS and OMAP2_IO_ADDRESS for future multi-omap
patches.

Signed-off-by: default avatarTony Lindgren <tony@atomide.com>
parent e1f80bfc

arch/arm/mach-omap2/cm.h

+4 −9
Original line number Diff line number Diff line
@@ -96,15 +96,10 @@ 
/* Clock management domain register get/set */



#ifndef __ASSEMBLER__

static inline void cm_write_mod_reg(u32 val, s16 module, s16 idx)

{

	__raw_writel(val, OMAP_CM_REGADDR(module, idx));

}



static inline u32 cm_read_mod_reg(s16 module, s16 idx)

{

	return __raw_readl(OMAP_CM_REGADDR(module, idx));

}



extern u32 cm_read_mod_reg(s16 module, u16 idx);

extern void cm_write_mod_reg(u32 val, s16 module, u16 idx);



#endif



/* CM register bits shared between 24XX and 3430 */

arch/arm/mach-omap2/control.c

+7 −17
Original line number Diff line number Diff line
@@ -13,22 +13,21 @@ 
#undef DEBUG



#include <linux/kernel.h>

#include <linux/io.h>



#include <asm/io.h>



#include <asm/arch/common.h>

#include <asm/arch/control.h>



static u32 omap2_ctrl_base;

static void __iomem *omap2_ctrl_base;



#define OMAP_CTRL_REGADDR(reg)	(void __iomem *)IO_ADDRESS(omap2_ctrl_base \

								+ (reg))

#define OMAP_CTRL_REGADDR(reg)		(omap2_ctrl_base + (reg))



void omap_ctrl_base_set(u32 base)

void __init omap2_set_globals_control(struct omap_globals *omap2_globals)

{

	omap2_ctrl_base = base;

	omap2_ctrl_base = omap2_globals->ctrl;

}



u32 omap_ctrl_base_get(void)

void __iomem *omap_ctrl_base_get(void)

{

	return omap2_ctrl_base;

}
@@ -50,25 +49,16 @@ u32 omap_ctrl_readl(u16 offset) 


void omap_ctrl_writeb(u8 val, u16 offset)

{

	pr_debug("omap_ctrl_writeb: writing 0x%0x to 0x%0x\n", val,

		 (u32)OMAP_CTRL_REGADDR(offset));



	__raw_writeb(val, OMAP_CTRL_REGADDR(offset));

}



void omap_ctrl_writew(u16 val, u16 offset)

{

	pr_debug("omap_ctrl_writew: writing 0x%0x to 0x%0x\n", val,

		 (u32)OMAP_CTRL_REGADDR(offset));



	__raw_writew(val, OMAP_CTRL_REGADDR(offset));

}



void omap_ctrl_writel(u32 val, u16 offset)

{

	pr_debug("omap_ctrl_writel: writing 0x%0x to 0x%0x\n", val,

		 (u32)OMAP_CTRL_REGADDR(offset));



	__raw_writel(val, OMAP_CTRL_REGADDR(offset));

}

arch/arm/mach-omap2/memory.c

+9 −2
Original line number Diff line number Diff line
@@ -24,6 +24,7 @@ 


#include <asm/io.h>



#include <asm/arch/common.h>

#include <asm/arch/clock.h>

#include <asm/arch/sram.h>
@@ -32,8 +33,8 @@ 
#include "memory.h"

#include "sdrc.h"



unsigned long omap2_sdrc_base;

unsigned long omap2_sms_base;

void __iomem *omap2_sdrc_base;

void __iomem *omap2_sms_base;



static struct memory_timings mem_timings;

static u32 curr_perf_level = CORE_CLK_SRC_DPLL_X2;
@@ -154,6 +155,12 @@ void omap2_init_memory_params(u32 force_lock_to_unlock_mode) 
	mem_timings.slow_dll_ctrl |= ((1 << 1) | (3 << 8));

}



void __init omap2_set_globals_memory(struct omap_globals *omap2_globals)

{

	omap2_sdrc_base = omap2_globals->sdrc;

	omap2_sms_base = omap2_globals->sms;

}



/* turn on smart idle modes for SDRAM scheduler and controller */

void __init omap2_init_memory(void)

{

arch/arm/mach-omap2/mux.c

+1 −1
Original line number Diff line number Diff line
@@ -236,7 +236,7 @@ void __init_or_module omap2_cfg_debug(const struct pin_config *cfg, u8 reg) 
	warn = (orig != reg);

	if (debug || warn)

		printk(KERN_WARNING

			"MUX: setup %s (0x%08x): 0x%02x -> 0x%02x\n",

			"MUX: setup %s (0x%p): 0x%04x -> 0x%04x\n",

			cfg->name, omap_ctrl_base_get() + cfg->mux_reg,

			orig, reg);

}

arch/arm/mach-omap2/prcm.c

+54 −1
Original line number Diff line number Diff line
@@ -16,12 +16,18 @@ 
#include <linux/module.h>

#include <linux/init.h>

#include <linux/clk.h>

#include <linux/io.h>



#include <asm/io.h>

#include <asm/arch/common.h>

#include <asm/arch/prcm.h>



#include "clock.h"

#include "prm.h"

#include "prm-regbits-24xx.h"



static void __iomem *prm_base;

static void __iomem *cm_base;



extern void omap2_clk_prepare_for_reboot(void);



u32 omap_prcm_get_reset_sources(void)
@@ -41,3 +47,50 @@ void omap_prcm_arch_reset(char mode) 
		prm_write_mod_reg(wkup, WKUP_MOD, RM_RSTCTRL);

	}

}



static inline u32 __omap_prcm_read(void __iomem *base, s16 module, u16 reg)

{

	BUG_ON(!base);

	return __raw_readl(base + module + reg);

}



static inline void __omap_prcm_write(u32 value, void __iomem *base,

						s16 module, u16 reg)

{

	BUG_ON(!base);

	__raw_writel(value, base + module + reg);

}



/* Read a register in a PRM module */

u32 prm_read_mod_reg(s16 module, u16 idx)

{

	return __omap_prcm_read(prm_base, module, idx);

}

EXPORT_SYMBOL(prm_read_mod_reg);



/* Write into a register in a PRM module */

void prm_write_mod_reg(u32 val, s16 module, u16 idx)

{

	__omap_prcm_write(val, prm_base, module, idx);

}

EXPORT_SYMBOL(prm_write_mod_reg);



/* Read a register in a CM module */

u32 cm_read_mod_reg(s16 module, u16 idx)

{

	return __omap_prcm_read(cm_base, module, idx);

}

EXPORT_SYMBOL(cm_read_mod_reg);



/* Write into a register in a CM module */

void cm_write_mod_reg(u32 val, s16 module, u16 idx)

{

	__omap_prcm_write(val, cm_base, module, idx);

}

EXPORT_SYMBOL(cm_write_mod_reg);



void __init omap2_set_globals_prcm(struct omap_globals *omap2_globals)

{

	prm_base = omap2_globals->prm;

	cm_base = omap2_globals->cm;

}