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Commit a5752e57 authored by Nicolas Ferre's avatar Nicolas Ferre Committed by Stephen Boyd
Browse files

clk: at91: add PMC sama5d2 support



Add support for the new sama5d2 SoC and adapt capabilities.

Signed-off-by: default avatarNicolas Ferre <nicolas.ferre@atmel.com>
Signed-off-by: default avatarBoris Brezillon <boris.brezillon@free-electrons.com>
Signed-off-by: default avatarStephen Boyd <sboyd@codeaurora.org>
parent 36844bdf
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+15 −0
Original line number Diff line number Diff line
@@ -206,6 +206,14 @@ static const struct at91_pmc_caps at91sam9x5_caps = {
			  AT91_PMC_MOSCRCS | AT91_PMC_CFDEV,
};

static const struct at91_pmc_caps sama5d2_caps = {
	.available_irqs = AT91_PMC_MOSCS | AT91_PMC_LOCKA | AT91_PMC_MCKRDY |
			  AT91_PMC_LOCKU | AT91_PMC_PCK0RDY |
			  AT91_PMC_PCK1RDY | AT91_PMC_PCK2RDY |
			  AT91_PMC_MOSCSELS | AT91_PMC_MOSCRCS |
			  AT91_PMC_CFDEV | AT91_PMC_GCKRDY,
};

static const struct at91_pmc_caps sama5d3_caps = {
	.available_irqs = AT91_PMC_MOSCS | AT91_PMC_LOCKA | AT91_PMC_MCKRDY |
			  AT91_PMC_LOCKU | AT91_PMC_PCK0RDY |
@@ -436,6 +444,13 @@ static void __init of_at91sam9x5_pmc_setup(struct device_node *np)
CLK_OF_DECLARE(at91sam9x5_clk_pmc, "atmel,at91sam9x5-pmc",
	       of_at91sam9x5_pmc_setup);

static void __init of_sama5d2_pmc_setup(struct device_node *np)
{
	of_at91_pmc_setup(np, &sama5d2_caps);
}
CLK_OF_DECLARE(sama5d2_clk_pmc, "atmel,sama5d2-pmc",
	       of_sama5d2_pmc_setup);

static void __init of_sama5d3_pmc_setup(struct device_node *np)
{
	of_at91_pmc_setup(np, &sama5d3_caps);
+1 −0
Original line number Diff line number Diff line
@@ -18,5 +18,6 @@
#define AT91_PMC_MOSCSELS	16		/* Main Oscillator Selection */
#define AT91_PMC_MOSCRCS	17		/* Main On-Chip RC */
#define AT91_PMC_CFDEV		18		/* Clock Failure Detector Event */
#define AT91_PMC_GCKRDY		24		/* Generated Clocks */

#endif
+1 −0
Original line number Diff line number Diff line
@@ -164,6 +164,7 @@ extern void __iomem *at91_pmc_base;
#define		AT91_PMC_MOSCSELS	(1 << 16)		/* Main Oscillator Selection [some SAM9] */
#define		AT91_PMC_MOSCRCS	(1 << 17)		/* Main On-Chip RC [some SAM9] */
#define		AT91_PMC_CFDEV		(1 << 18)		/* Clock Failure Detector Event [some SAM9] */
#define		AT91_PMC_GCKRDY		(1 << 24)		/* Generated Clocks */
#define	AT91_PMC_IMR		0x6c			/* Interrupt Mask Register */

#define AT91_PMC_PLLICPR	0x80			/* PLL Charge Pump Current Register */