Donate to e Foundation | Murena handsets with /e/OS | Own a part of Murena! Learn more

Commit a56f31a0 authored by Linus Torvalds's avatar Linus Torvalds
Browse files

Merge branch 'drm-fixes' of git://git.kernel.org/pub/scm/linux/kernel/git/airlied/drm-2.6 

* 'drm-fixes' of git://git.kernel.org/pub/scm/linux/kernel/git/airlied/drm-2.6:
  drm/radeon/kms: Silent spurious error message
  drm/radeon/kms: fix bad cast/shift in evergreen.c
  drm/radeon/kms: make TV/DFP table info less verbose
  drm/radeon/kms: leave certain CP int bits enabled
  drm/radeon/kms: avoid corner case issue with unmappable vram V2
parents 509d4486 a8c051f0

drivers/gpu/drm/radeon/evergreen.c

+3 −2
Original line number Diff line number Diff line
@@ -1137,7 +1137,7 @@ static void evergreen_gpu_init(struct radeon_device *rdev) 


		WREG32(RCU_IND_INDEX, 0x203);

		efuse_straps_3 = RREG32(RCU_IND_DATA);

		efuse_box_bit_127_124 = (u8)(efuse_straps_3 & 0xF0000000) >> 28;

		efuse_box_bit_127_124 = (u8)((efuse_straps_3 & 0xF0000000) >> 28);



		switch(efuse_box_bit_127_124) {

		case 0x0:
@@ -1407,6 +1407,7 @@ int evergreen_mc_init(struct radeon_device *rdev) 
	rdev->mc.mc_vram_size = RREG32(CONFIG_MEMSIZE) * 1024 * 1024;

	rdev->mc.real_vram_size = RREG32(CONFIG_MEMSIZE) * 1024 * 1024;

	rdev->mc.visible_vram_size = rdev->mc.aper_size;

	rdev->mc.active_vram_size = rdev->mc.visible_vram_size;

	r600_vram_gtt_location(rdev, &rdev->mc);

	radeon_update_bandwidth_info(rdev);
@@ -1520,7 +1521,7 @@ void evergreen_disable_interrupt_state(struct radeon_device *rdev) 
{

	u32 tmp;



	WREG32(CP_INT_CNTL, 0);

	WREG32(CP_INT_CNTL, CNTX_BUSY_INT_ENABLE | CNTX_EMPTY_INT_ENABLE);

	WREG32(GRBM_INT_CNTL, 0);

	WREG32(INT_MASK + EVERGREEN_CRTC0_REGISTER_OFFSET, 0);

	WREG32(INT_MASK + EVERGREEN_CRTC1_REGISTER_OFFSET, 0);

drivers/gpu/drm/radeon/r100.c

+3 −0
Original line number Diff line number Diff line
@@ -1030,6 +1030,7 @@ int r100_cp_init(struct radeon_device *rdev, unsigned ring_size) 
		return r;

	}

	rdev->cp.ready = true;

	rdev->mc.active_vram_size = rdev->mc.real_vram_size;

	return 0;

}
@@ -1047,6 +1048,7 @@ void r100_cp_fini(struct radeon_device *rdev) 
void r100_cp_disable(struct radeon_device *rdev)

{

	/* Disable ring */

	rdev->mc.active_vram_size = rdev->mc.visible_vram_size;

	rdev->cp.ready = false;

	WREG32(RADEON_CP_CSQ_MODE, 0);

	WREG32(RADEON_CP_CSQ_CNTL, 0);
@@ -2295,6 +2297,7 @@ void r100_vram_init_sizes(struct radeon_device *rdev) 
	/* FIXME we don't use the second aperture yet when we could use it */

	if (rdev->mc.visible_vram_size > rdev->mc.aper_size)

		rdev->mc.visible_vram_size = rdev->mc.aper_size;

	rdev->mc.active_vram_size = rdev->mc.visible_vram_size;

	config_aper_size = RREG32(RADEON_CONFIG_APER_SIZE);

	if (rdev->flags & RADEON_IS_IGP) {

		uint32_t tom;

drivers/gpu/drm/radeon/r600.c

+3 −1
Original line number Diff line number Diff line
@@ -1248,6 +1248,7 @@ int r600_mc_init(struct radeon_device *rdev) 
	rdev->mc.mc_vram_size = RREG32(CONFIG_MEMSIZE);

	rdev->mc.real_vram_size = RREG32(CONFIG_MEMSIZE);

	rdev->mc.visible_vram_size = rdev->mc.aper_size;

	rdev->mc.active_vram_size = rdev->mc.visible_vram_size;

	r600_vram_gtt_location(rdev, &rdev->mc);



	if (rdev->flags & RADEON_IS_IGP) {
@@ -1917,6 +1918,7 @@ void r600_pciep_wreg(struct radeon_device *rdev, u32 reg, u32 v) 
 */

void r600_cp_stop(struct radeon_device *rdev)

{

	rdev->mc.active_vram_size = rdev->mc.visible_vram_size;

	WREG32(R_0086D8_CP_ME_CNTL, S_0086D8_CP_ME_HALT(1));

}
@@ -2910,7 +2912,7 @@ static void r600_disable_interrupt_state(struct radeon_device *rdev) 
{

	u32 tmp;



	WREG32(CP_INT_CNTL, 0);

	WREG32(CP_INT_CNTL, CNTX_BUSY_INT_ENABLE | CNTX_EMPTY_INT_ENABLE);

	WREG32(GRBM_INT_CNTL, 0);

	WREG32(DxMODE_INT_MASK, 0);

	if (ASIC_IS_DCE3(rdev)) {

drivers/gpu/drm/radeon/r600_blit_kms.c

+2 −0
Original line number Diff line number Diff line
@@ -532,6 +532,7 @@ int r600_blit_init(struct radeon_device *rdev) 
	memcpy(ptr + rdev->r600_blit.ps_offset, r6xx_ps, r6xx_ps_size * 4);

	radeon_bo_kunmap(rdev->r600_blit.shader_obj);

	radeon_bo_unreserve(rdev->r600_blit.shader_obj);

	rdev->mc.active_vram_size = rdev->mc.real_vram_size;

	return 0;

}
@@ -539,6 +540,7 @@ void r600_blit_fini(struct radeon_device *rdev) 
{

	int r;



	rdev->mc.active_vram_size = rdev->mc.visible_vram_size;

	if (rdev->r600_blit.shader_obj == NULL)

		return;

	/* If we can't reserve the bo, unref should be enough to destroy

drivers/gpu/drm/radeon/radeon.h

+1 −0
Original line number Diff line number Diff line
@@ -344,6 +344,7 @@ struct radeon_mc { 
	 * about vram size near mc fb location */

	u64			mc_vram_size;

	u64			visible_vram_size;

	u64			active_vram_size;

	u64			gtt_size;

	u64			gtt_start;

	u64			gtt_end;