Loading arch/arc/include/asm/arcregs.h +1 −0 Original line number Diff line number Diff line Loading @@ -30,6 +30,7 @@ #define ARC_REG_D_UNCACH_BCR 0x6A #define ARC_REG_BPU_BCR 0xc0 #define ARC_REG_ISA_CFG_BCR 0xc1 #define ARC_REG_RTT_BCR 0xF2 #define ARC_REG_SMART_BCR 0xFF /* status32 Bits Positions */ Loading arch/arc/kernel/setup.c +4 −1 Original line number Diff line number Diff line Loading @@ -120,7 +120,10 @@ static void read_arc_build_cfg_regs(void) READ_BCR(ARC_REG_SMART_BCR, bcr); cpu->extn.smart = bcr.ver ? 1 : 0; cpu->extn.debug = cpu->extn.ap | cpu->extn.smart; READ_BCR(ARC_REG_RTT_BCR, bcr); cpu->extn.rtt = bcr.ver ? 1 : 0; cpu->extn.debug = cpu->extn.ap | cpu->extn.smart | cpu->extn.rtt; } static const struct cpuinfo_data arc_cpu_tbl[] = { Loading Loading
arch/arc/include/asm/arcregs.h +1 −0 Original line number Diff line number Diff line Loading @@ -30,6 +30,7 @@ #define ARC_REG_D_UNCACH_BCR 0x6A #define ARC_REG_BPU_BCR 0xc0 #define ARC_REG_ISA_CFG_BCR 0xc1 #define ARC_REG_RTT_BCR 0xF2 #define ARC_REG_SMART_BCR 0xFF /* status32 Bits Positions */ Loading
arch/arc/kernel/setup.c +4 −1 Original line number Diff line number Diff line Loading @@ -120,7 +120,10 @@ static void read_arc_build_cfg_regs(void) READ_BCR(ARC_REG_SMART_BCR, bcr); cpu->extn.smart = bcr.ver ? 1 : 0; cpu->extn.debug = cpu->extn.ap | cpu->extn.smart; READ_BCR(ARC_REG_RTT_BCR, bcr); cpu->extn.rtt = bcr.ver ? 1 : 0; cpu->extn.debug = cpu->extn.ap | cpu->extn.smart | cpu->extn.rtt; } static const struct cpuinfo_data arc_cpu_tbl[] = { Loading