Commit a40a2b67 authored Sep 28, 2013 by Vladimir Murzin Committed by Benjamin Herrenschmidt Oct 31, 2013

powerpc/bpf: Fix DIVWU instruction opcode



Currently DIVWU stands for *signed* divw opcode:

7d 2a 4b 96 	divwu   r9,r10,r9
7d 2a 4b d6 	divw    r9,r10,r9

Use the *unsigned* divw opcode for DIVWU.

Suggested-by: Vassili Karpov <av1474@comtv.ru>
Reviewed-by: Vassili Karpov <av1474@comtv.ru>
Signed-off-by: Vladimir Murzin <murzin.v@gmail.com>
Acked-by: Matt Evans <matt@ozlabs.org>
Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>

parent a3e31b45

arch/powerpc/include/asm/ppc-opcode.h

+1 −1

Original line number	Diff line number	Diff line
		@@ -222,7 +222,7 @@
		#define PPC_INST_MULLW 0x7c0001d6
		#define PPC_INST_MULHWU 0x7c000016
		#define PPC_INST_MULLI 0x1c000000
		#define PPC_INST_DIVWU 0x7c0003d6
		#define PPC_INST_DIVWU 0x7c000396
		#define PPC_INST_RLWINM 0x54000000
		#define PPC_INST_RLDICR 0x78000004
		#define PPC_INST_SLW 0x7c000030