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Commit a2fb4934 authored by Rex Zhu's avatar Rex Zhu Committed by Alex Deucher
Browse files

drm/amd/powerplay: initialize variables which were missed. 



Missing pcie dpm settings.

Signed-off-by: default avatarRex Zhu <Rex.Zhu@amd.com>
Reviewed-by: default avatarAlex Deucher <alexander.deucher@amd.com>
Reviewed-by: default avatarKen Wang <Qingqing.Wang@amd.com>
Signed-off-by: default avatarAlex Deucher <alexander.deucher@amd.com>
parent 919e334d

drivers/gpu/drm/amd/powerplay/hwmgr/fiji_hwmgr.c

+2 −0
Original line number Original line Diff line number Diff line
@@ -633,6 +633,8 @@ static int fiji_hwmgr_backend_init(struct pp_hwmgr *hwmgr) 
	data->vddci_control = FIJI_VOLTAGE_CONTROL_NONE;

	data->vddci_control = FIJI_VOLTAGE_CONTROL_NONE;

	data->mvdd_control = FIJI_VOLTAGE_CONTROL_NONE;

	data->mvdd_control = FIJI_VOLTAGE_CONTROL_NONE;





	data->force_pcie_gen = PP_PCIEGenInvalid;



	if (atomctrl_is_voltage_controled_by_gpio_v3(hwmgr,

	if (atomctrl_is_voltage_controled_by_gpio_v3(hwmgr,

			VOLTAGE_TYPE_VDDC, VOLTAGE_OBJ_SVID2))

			VOLTAGE_TYPE_VDDC, VOLTAGE_OBJ_SVID2))

		data->voltage_control = FIJI_VOLTAGE_CONTROL_BY_SVID2;

		data->voltage_control = FIJI_VOLTAGE_CONTROL_BY_SVID2;

drivers/gpu/drm/amd/powerplay/hwmgr/polaris10_hwmgr.c

+1 −0
Original line number Original line Diff line number Diff line
@@ -2941,6 +2941,7 @@ int polaris10_hwmgr_backend_init(struct pp_hwmgr *hwmgr) 




	data->enable_tdc_limit_feature = true;

	data->enable_tdc_limit_feature = true;

	data->enable_pkg_pwr_tracking_feature = true;

	data->enable_pkg_pwr_tracking_feature = true;

	data->force_pcie_gen = PP_PCIEGenInvalid;





	if (atomctrl_is_voltage_controled_by_gpio_v3(hwmgr,

	if (atomctrl_is_voltage_controled_by_gpio_v3(hwmgr,

			VOLTAGE_TYPE_VDDC, VOLTAGE_OBJ_SVID2))

			VOLTAGE_TYPE_VDDC, VOLTAGE_OBJ_SVID2))

drivers/gpu/drm/amd/powerplay/hwmgr/tonga_hwmgr.c

+1 −0
Original line number Original line Diff line number Diff line
@@ -4489,6 +4489,7 @@ int tonga_hwmgr_backend_init(struct pp_hwmgr *hwmgr) 
	data->vdd_ci_control = TONGA_VOLTAGE_CONTROL_NONE;

	data->vdd_ci_control = TONGA_VOLTAGE_CONTROL_NONE;

	data->vdd_gfx_control = TONGA_VOLTAGE_CONTROL_NONE;

	data->vdd_gfx_control = TONGA_VOLTAGE_CONTROL_NONE;

	data->mvdd_control = TONGA_VOLTAGE_CONTROL_NONE;

	data->mvdd_control = TONGA_VOLTAGE_CONTROL_NONE;

	data->force_pcie_gen = PP_PCIEGenInvalid;





	if (atomctrl_is_voltage_controled_by_gpio_v3(hwmgr,

	if (atomctrl_is_voltage_controled_by_gpio_v3(hwmgr,

				VOLTAGE_TYPE_VDDC, VOLTAGE_OBJ_SVID2)) {

				VOLTAGE_TYPE_VDDC, VOLTAGE_OBJ_SVID2)) {