bnx2x: Add dual-media changes (a22f0788) · Commits · e / devices / android_kernel_teracube_2e

drivers/net/bnx2x/bnx2x.h

+5 −5

Original line number	Diff line number	Diff line
		@@ -566,13 +566,13 @@ struct bnx2x_common {
		struct bnx2x_port {
		u32 pmf;

		u32 link_config;
		u32 link_config[LINK_CONFIG_SIZE];

		u32 supported;
		u32 supported[LINK_CONFIG_SIZE];
		/* link settings - missing defines */
		#define SUPPORTED_2500baseX_Full (1 << 15)

		u32 advertising;
		u32 advertising[LINK_CONFIG_SIZE];
		/* link settings - missing defines */
		#define ADVERTISED_2500baseX_Full (1 << 15)

		@@ -931,7 +931,7 @@ void bnx2x_write_dmae(struct bnx2x *bp, dma_addr_t dma_addr, u32 dst_addr,
		int bnx2x_get_gpio(struct bnx2x *bp, int gpio_num, u8 port);
		int bnx2x_set_gpio(struct bnx2x *bp, int gpio_num, u32 mode, u8 port);
		int bnx2x_set_gpio_int(struct bnx2x *bp, int gpio_num, u32 mode, u8 port);
		u32 bnx2x_fw_command(struct bnx2x *bp, u32 command);
		u32 bnx2x_fw_command(struct bnx2x *bp, u32 command, u32 param);
		void bnx2x_reg_wr_ind(struct bnx2x *bp, u32 addr, u32 val);
		void bnx2x_write_dmae_phys_len(struct bnx2x *bp, dma_addr_t phys_addr,
		u32 addr, u32 len);
		@@ -939,7 +939,7 @@ void bnx2x_calc_fc_adv(struct bnx2x *bp);
		int bnx2x_sp_post(struct bnx2x *bp, int command, int cid,
		u32 data_hi, u32 data_lo, int common);
		void bnx2x_update_coalesce(struct bnx2x *bp);

		int bnx2x_get_link_cfg_idx(struct bnx2x *bp);
		static inline u32 reg_poll(struct bnx2x *bp, u32 reg, u32 expected, int ms,
		int wait)
		{

drivers/net/bnx2x/bnx2x_cmn.c

+7 −7

Original line number	Diff line number	Diff line
		@@ -1283,7 +1283,7 @@ int bnx2x_nic_load(struct bnx2x *bp, int load_mode)
		common blocks should be initialized, otherwise - not
		*/
		if (!BP_NOMCP(bp)) {
		load_code = bnx2x_fw_command(bp, DRV_MSG_CODE_LOAD_REQ);
		load_code = bnx2x_fw_command(bp, DRV_MSG_CODE_LOAD_REQ, 0);
		if (!load_code) {
		BNX2X_ERR("MCP response failure, aborting\n");
		rc = -EBUSY;
		@@ -1322,9 +1322,9 @@ int bnx2x_nic_load(struct bnx2x *bp, int load_mode)
		rc = bnx2x_init_hw(bp, load_code);
		if (rc) {
		BNX2X_ERR("HW init failed, aborting\n");
		bnx2x_fw_command(bp, DRV_MSG_CODE_LOAD_DONE);
		bnx2x_fw_command(bp, DRV_MSG_CODE_UNLOAD_REQ_WOL_MCP);
		bnx2x_fw_command(bp, DRV_MSG_CODE_UNLOAD_DONE);
		bnx2x_fw_command(bp, DRV_MSG_CODE_LOAD_DONE, 0);
		bnx2x_fw_command(bp, DRV_MSG_CODE_UNLOAD_REQ_WOL_MCP, 0);
		bnx2x_fw_command(bp, DRV_MSG_CODE_UNLOAD_DONE, 0);
		goto load_error2;
		}

		@@ -1339,7 +1339,7 @@ int bnx2x_nic_load(struct bnx2x *bp, int load_mode)

		/* Send LOAD_DONE command to MCP */
		if (!BP_NOMCP(bp)) {
		load_code = bnx2x_fw_command(bp, DRV_MSG_CODE_LOAD_DONE);
		load_code = bnx2x_fw_command(bp, DRV_MSG_CODE_LOAD_DONE, 0);
		if (!load_code) {
		BNX2X_ERR("MCP response failure, aborting\n");
		rc = -EBUSY;
		@@ -1455,8 +1455,8 @@ int bnx2x_nic_load(struct bnx2x *bp, int load_mode)
		load_error3:
		bnx2x_int_disable_sync(bp, 1);
		if (!BP_NOMCP(bp)) {
		bnx2x_fw_command(bp, DRV_MSG_CODE_UNLOAD_REQ_WOL_MCP);
		bnx2x_fw_command(bp, DRV_MSG_CODE_UNLOAD_DONE);
		bnx2x_fw_command(bp, DRV_MSG_CODE_UNLOAD_REQ_WOL_MCP, 0);
		bnx2x_fw_command(bp, DRV_MSG_CODE_UNLOAD_DONE, 0);
		}
		bp->port.pmf = 0;
		/* Free SKBs, SGEs, TPA pool and driver internals */

drivers/net/bnx2x/bnx2x_cmn.h

+2 −1

Original line number	Diff line number	Diff line
		@@ -49,10 +49,11 @@ void bnx2x_link_set(struct bnx2x *bp);
		* Query link status
		*
		* @param bp
		* @param is_serdes
		*
		* @return 0 - link is UP
		*/
		u8 bnx2x_link_test(struct bnx2x *bp);
		u8 bnx2x_link_test(struct bnx2x *bp, u8 is_serdes);

		/**
		* Handles link status change

drivers/net/bnx2x/bnx2x_ethtool.c

+121 −55

Original line number	Diff line number	Diff line
		@@ -29,9 +29,12 @@
		static int bnx2x_get_settings(struct net_device dev, struct ethtool_cmd cmd)
		{
		struct bnx2x *bp = netdev_priv(dev);

		cmd->supported = bp->port.supported;
		cmd->advertising = bp->port.advertising;
		int cfg_idx = bnx2x_get_link_cfg_idx(bp);
		/* Dual Media boards present all available port types */
		cmd->supported = bp->port.supported[cfg_idx] \|
		(bp->port.supported[cfg_idx ^ 1] &
		(SUPPORTED_TP \| SUPPORTED_FIBRE));
		cmd->advertising = bp->port.advertising[cfg_idx];

		if ((bp->state == BNX2X_STATE_OPEN) &&
		!(bp->flags & MF_FUNC_DIS) &&
		@@ -48,22 +51,21 @@ static int bnx2x_get_settings(struct net_device dev, struct ethtool_cmd cmd)
		cmd->speed = vn_max_rate;
		}
		} else {
		cmd->speed = -1;
		cmd->duplex = -1;
		cmd->speed = bp->link_params.req_line_speed[cfg_idx];
		cmd->duplex = bp->link_params.req_duplex[cfg_idx];
		}

		if (bp->link_params.num_phys > 0) {
		if (bp->link_params.phy[bp->link_params.num_phys - 1].
		supported & SUPPORTED_FIBRE)
		if (bp->port.supported[cfg_idx] & SUPPORTED_TP)
		cmd->port = PORT_TP;
		else if (bp->port.supported[cfg_idx] & SUPPORTED_FIBRE)
		cmd->port = PORT_FIBRE;
		else
		cmd->port = PORT_TP;
		} else
		DP(NETIF_MSG_LINK, "No media found\n");
		BNX2X_ERR("XGXS PHY Failure detected\n");

		cmd->phy_address = bp->mdio.prtad;
		cmd->transceiver = XCVR_INTERNAL;

		if (bp->link_params.req_line_speed == SPEED_AUTO_NEG)
		if (bp->link_params.req_line_speed[cfg_idx] == SPEED_AUTO_NEG)
		cmd->autoneg = AUTONEG_ENABLE;
		else
		cmd->autoneg = AUTONEG_DISABLE;
		@@ -85,7 +87,7 @@ static int bnx2x_get_settings(struct net_device dev, struct ethtool_cmd cmd)
		static int bnx2x_set_settings(struct net_device dev, struct ethtool_cmd cmd)
		{
		struct bnx2x *bp = netdev_priv(dev);
		u32 advertising;
		u32 advertising, cfg_idx, old_multi_phy_config, new_multi_phy_config;

		if (IS_E1HMF(bp))
		return 0;
		@@ -98,26 +100,81 @@ static int bnx2x_set_settings(struct net_device dev, struct ethtool_cmd cmd)
		cmd->duplex, cmd->port, cmd->phy_address, cmd->transceiver,
		cmd->autoneg, cmd->maxtxpkt, cmd->maxrxpkt);

		cfg_idx = bnx2x_get_link_cfg_idx(bp);
		old_multi_phy_config = bp->link_params.multi_phy_config;
		switch (cmd->port) {
		case PORT_TP:
		if (bp->port.supported[cfg_idx] & SUPPORTED_TP)
		break; /* no port change */

		if (!(bp->port.supported[0] & SUPPORTED_TP \|\|
		bp->port.supported[1] & SUPPORTED_TP)) {
		DP(NETIF_MSG_LINK, "Unsupported port type\n");
		return -EINVAL;
		}
		bp->link_params.multi_phy_config &=
		~PORT_HW_CFG_PHY_SELECTION_MASK;
		if (bp->link_params.multi_phy_config &
		PORT_HW_CFG_PHY_SWAPPED_ENABLED)
		bp->link_params.multi_phy_config \|=
		PORT_HW_CFG_PHY_SELECTION_SECOND_PHY;
		else
		bp->link_params.multi_phy_config \|=
		PORT_HW_CFG_PHY_SELECTION_FIRST_PHY;
		break;
		case PORT_FIBRE:
		if (bp->port.supported[cfg_idx] & SUPPORTED_FIBRE)
		break; /* no port change */

		if (!(bp->port.supported[0] & SUPPORTED_FIBRE \|\|
		bp->port.supported[1] & SUPPORTED_FIBRE)) {
		DP(NETIF_MSG_LINK, "Unsupported port type\n");
		return -EINVAL;
		}
		bp->link_params.multi_phy_config &=
		~PORT_HW_CFG_PHY_SELECTION_MASK;
		if (bp->link_params.multi_phy_config &
		PORT_HW_CFG_PHY_SWAPPED_ENABLED)
		bp->link_params.multi_phy_config \|=
		PORT_HW_CFG_PHY_SELECTION_FIRST_PHY;
		else
		bp->link_params.multi_phy_config \|=
		PORT_HW_CFG_PHY_SELECTION_SECOND_PHY;
		break;
		default:
		DP(NETIF_MSG_LINK, "Unsupported port type\n");
		return -EINVAL;
		}
		/* Save new config in case command complete successuly */
		new_multi_phy_config = bp->link_params.multi_phy_config;
		/* Get the new cfg_idx */
		cfg_idx = bnx2x_get_link_cfg_idx(bp);
		/* Restore old config in case command failed */
		bp->link_params.multi_phy_config = old_multi_phy_config;
		DP(NETIF_MSG_LINK, "cfg_idx = %x\n", cfg_idx);

		if (cmd->autoneg == AUTONEG_ENABLE) {
		if (!(bp->port.supported & SUPPORTED_Autoneg)) {
		if (!(bp->port.supported[cfg_idx] & SUPPORTED_Autoneg)) {
		DP(NETIF_MSG_LINK, "Autoneg not supported\n");
		return -EINVAL;
		}

		/* advertise the requested speed and duplex if supported */
		cmd->advertising &= bp->port.supported;
		cmd->advertising &= bp->port.supported[cfg_idx];

		bp->link_params.req_line_speed = SPEED_AUTO_NEG;
		bp->link_params.req_duplex = DUPLEX_FULL;
		bp->port.advertising \|= (ADVERTISED_Autoneg \|
		bp->link_params.req_line_speed[cfg_idx] = SPEED_AUTO_NEG;
		bp->link_params.req_duplex[cfg_idx] = DUPLEX_FULL;
		bp->port.advertising[cfg_idx] \|= (ADVERTISED_Autoneg \|
		cmd->advertising);

		} else { /* forced speed */
		/* advertise the requested speed and duplex if supported */
		switch (cmd->speed) {
		u32 speed = cmd->speed;
		speed \|= (cmd->speed_hi << 16);
		switch (speed) {
		case SPEED_10:
		if (cmd->duplex == DUPLEX_FULL) {
		if (!(bp->port.supported &
		if (!(bp->port.supported[cfg_idx] &
		SUPPORTED_10baseT_Full)) {
		DP(NETIF_MSG_LINK,
		"10M full not supported\n");
		@@ -127,7 +184,7 @@ static int bnx2x_set_settings(struct net_device dev, struct ethtool_cmd cmd)
		advertising = (ADVERTISED_10baseT_Full \|
		ADVERTISED_TP);
		} else {
		if (!(bp->port.supported &
		if (!(bp->port.supported[cfg_idx] &
		SUPPORTED_10baseT_Half)) {
		DP(NETIF_MSG_LINK,
		"10M half not supported\n");
		@@ -141,7 +198,7 @@ static int bnx2x_set_settings(struct net_device dev, struct ethtool_cmd cmd)

		case SPEED_100:
		if (cmd->duplex == DUPLEX_FULL) {
		if (!(bp->port.supported &
		if (!(bp->port.supported[cfg_idx] &
		SUPPORTED_100baseT_Full)) {
		DP(NETIF_MSG_LINK,
		"100M full not supported\n");
		@@ -151,7 +208,7 @@ static int bnx2x_set_settings(struct net_device dev, struct ethtool_cmd cmd)
		advertising = (ADVERTISED_100baseT_Full \|
		ADVERTISED_TP);
		} else {
		if (!(bp->port.supported &
		if (!(bp->port.supported[cfg_idx] &
		SUPPORTED_100baseT_Half)) {
		DP(NETIF_MSG_LINK,
		"100M half not supported\n");
		@@ -169,7 +226,8 @@ static int bnx2x_set_settings(struct net_device dev, struct ethtool_cmd cmd)
		return -EINVAL;
		}

		if (!(bp->port.supported & SUPPORTED_1000baseT_Full)) {
		if (!(bp->port.supported[cfg_idx] &
		SUPPORTED_1000baseT_Full)) {
		DP(NETIF_MSG_LINK, "1G full not supported\n");
		return -EINVAL;
		}
		@@ -185,7 +243,8 @@ static int bnx2x_set_settings(struct net_device dev, struct ethtool_cmd cmd)
		return -EINVAL;
		}

		if (!(bp->port.supported & SUPPORTED_2500baseX_Full)) {
		if (!(bp->port.supported[cfg_idx]
		& SUPPORTED_2500baseX_Full)) {
		DP(NETIF_MSG_LINK,
		"2.5G full not supported\n");
		return -EINVAL;
		@@ -201,7 +260,8 @@ static int bnx2x_set_settings(struct net_device dev, struct ethtool_cmd cmd)
		return -EINVAL;
		}

		if (!(bp->port.supported & SUPPORTED_10000baseT_Full)) {
		if (!(bp->port.supported[cfg_idx]
		& SUPPORTED_10000baseT_Full)) {
		DP(NETIF_MSG_LINK, "10G full not supported\n");
		return -EINVAL;
		}
		@@ -211,20 +271,23 @@ static int bnx2x_set_settings(struct net_device dev, struct ethtool_cmd cmd)
		break;

		default:
		DP(NETIF_MSG_LINK, "Unsupported speed\n");
		DP(NETIF_MSG_LINK, "Unsupported speed %d\n", speed);
		return -EINVAL;
		}

		bp->link_params.req_line_speed = cmd->speed;
		bp->link_params.req_duplex = cmd->duplex;
		bp->port.advertising = advertising;
		bp->link_params.req_line_speed[cfg_idx] = speed;
		bp->link_params.req_duplex[cfg_idx] = cmd->duplex;
		bp->port.advertising[cfg_idx] = advertising;
		}

		DP(NETIF_MSG_LINK, "req_line_speed %d\n"
		DP_LEVEL " req_duplex %d advertising 0x%x\n",
		bp->link_params.req_line_speed, bp->link_params.req_duplex,
		bp->port.advertising);
		bp->link_params.req_line_speed[cfg_idx],
		bp->link_params.req_duplex[cfg_idx],
		bp->port.advertising[cfg_idx]);

		/* Set new config */
		bp->link_params.multi_phy_config = new_multi_phy_config;
		if (netif_running(dev)) {
		bnx2x_stats_handle(bp, STATS_EVENT_STOP);
		bnx2x_link_set(bp);
		@@ -937,10 +1000,9 @@ static void bnx2x_get_pauseparam(struct net_device *dev,
		struct ethtool_pauseparam *epause)
		{
		struct bnx2x *bp = netdev_priv(dev);

		epause->autoneg = (bp->link_params.req_flow_ctrl ==
		BNX2X_FLOW_CTRL_AUTO) &&
		(bp->link_params.req_line_speed == SPEED_AUTO_NEG);
		int cfg_idx = bnx2x_get_link_cfg_idx(bp);
		epause->autoneg = (bp->link_params.req_flow_ctrl[cfg_idx] ==
		BNX2X_FLOW_CTRL_AUTO);

		epause->rx_pause = ((bp->link_vars.flow_ctrl & BNX2X_FLOW_CTRL_RX) ==
		BNX2X_FLOW_CTRL_RX);
		@@ -956,7 +1018,7 @@ static int bnx2x_set_pauseparam(struct net_device *dev,
		struct ethtool_pauseparam *epause)
		{
		struct bnx2x *bp = netdev_priv(dev);

		u32 cfg_idx = bnx2x_get_link_cfg_idx(bp);
		if (IS_E1HMF(bp))
		return 0;

		@@ -964,29 +1026,31 @@ static int bnx2x_set_pauseparam(struct net_device *dev,
		DP_LEVEL " autoneg %d rx_pause %d tx_pause %d\n",
		epause->cmd, epause->autoneg, epause->rx_pause, epause->tx_pause);

		bp->link_params.req_flow_ctrl = BNX2X_FLOW_CTRL_AUTO;
		bp->link_params.req_flow_ctrl[cfg_idx] = BNX2X_FLOW_CTRL_AUTO;

		if (epause->rx_pause)
		bp->link_params.req_flow_ctrl \|= BNX2X_FLOW_CTRL_RX;
		bp->link_params.req_flow_ctrl[cfg_idx] \|= BNX2X_FLOW_CTRL_RX;

		if (epause->tx_pause)
		bp->link_params.req_flow_ctrl \|= BNX2X_FLOW_CTRL_TX;
		bp->link_params.req_flow_ctrl[cfg_idx] \|= BNX2X_FLOW_CTRL_TX;

		if (bp->link_params.req_flow_ctrl == BNX2X_FLOW_CTRL_AUTO)
		bp->link_params.req_flow_ctrl = BNX2X_FLOW_CTRL_NONE;
		if (bp->link_params.req_flow_ctrl[cfg_idx] == BNX2X_FLOW_CTRL_AUTO)
		bp->link_params.req_flow_ctrl[cfg_idx] = BNX2X_FLOW_CTRL_NONE;

		if (epause->autoneg) {
		if (!(bp->port.supported & SUPPORTED_Autoneg)) {
		if (!(bp->port.supported[cfg_idx] & SUPPORTED_Autoneg)) {
		DP(NETIF_MSG_LINK, "autoneg not supported\n");
		return -EINVAL;
		}

		if (bp->link_params.req_line_speed == SPEED_AUTO_NEG)
		bp->link_params.req_flow_ctrl = BNX2X_FLOW_CTRL_AUTO;
		if (bp->link_params.req_line_speed[cfg_idx] == SPEED_AUTO_NEG) {
		bp->link_params.req_flow_ctrl[cfg_idx] =
		BNX2X_FLOW_CTRL_AUTO;
		}
		}

		DP(NETIF_MSG_LINK,
		"req_flow_ctrl 0x%x\n", bp->link_params.req_flow_ctrl);
		"req_flow_ctrl 0x%x\n", bp->link_params.req_flow_ctrl[cfg_idx]);

		if (netif_running(dev)) {
		bnx2x_stats_handle(bp, STATS_EVENT_STOP);
		@@ -1250,12 +1314,12 @@ static int bnx2x_test_memory(struct bnx2x *bp)
		return rc;
		}

		static void bnx2x_wait_for_link(struct bnx2x *bp, u8 link_up)
		static void bnx2x_wait_for_link(struct bnx2x *bp, u8 link_up, u8 is_serdes)
		{
		int cnt = 1000;

		if (link_up)
		while (bnx2x_link_test(bp) && cnt--)
		while (bnx2x_link_test(bp, is_serdes) && cnt--)
		msleep(10);
		}

		@@ -1527,7 +1591,7 @@ static void bnx2x_self_test(struct net_device *dev,
		struct ethtool_test etest, u64 buf)
		{
		struct bnx2x *bp = netdev_priv(dev);

		u8 is_serdes;
		if (bp->recovery_state != BNX2X_RECOVERY_DONE) {
		printk(KERN_ERR "Handling parity error recovery. Try again later\n");
		etest->flags \|= ETH_TEST_FL_FAILED;
		@@ -1542,6 +1606,7 @@ static void bnx2x_self_test(struct net_device *dev,
		/* offline tests are not supported in MF mode */
		if (IS_E1HMF(bp))
		etest->flags &= ~ETH_TEST_FL_OFFLINE;
		is_serdes = (bp->link_vars.link_status & LINK_STATUS_SERDES_LINK) > 0;

		if (etest->flags & ETH_TEST_FL_OFFLINE) {
		int port = BP_PORT(bp);
		@@ -1553,11 +1618,12 @@ static void bnx2x_self_test(struct net_device *dev,
		/* disable input for TX port IF */
		REG_WR(bp, NIG_REG_EGRESS_UMP0_IN_EN + port*4, 0);

		link_up = (bnx2x_link_test(bp) == 0);
		link_up = bp->link_vars.link_up;

		bnx2x_nic_unload(bp, UNLOAD_NORMAL);
		bnx2x_nic_load(bp, LOAD_DIAG);
		/* wait until link state is restored */
		bnx2x_wait_for_link(bp, link_up);
		bnx2x_wait_for_link(bp, link_up, is_serdes);

		if (bnx2x_test_registers(bp) != 0) {
		buf[0] = 1;
		@@ -1578,7 +1644,7 @@ static void bnx2x_self_test(struct net_device *dev,

		bnx2x_nic_load(bp, LOAD_NORMAL);
		/* wait until link state is restored */
		bnx2x_wait_for_link(bp, link_up);
		bnx2x_wait_for_link(bp, link_up, is_serdes);
		}
		if (bnx2x_test_nvram(bp) != 0) {
		buf[3] = 1;
		@@ -1589,7 +1655,7 @@ static void bnx2x_self_test(struct net_device *dev,
		etest->flags \|= ETH_TEST_FL_FAILED;
		}
		if (bp->port.pmf)
		if (bnx2x_link_test(bp) != 0) {
		if (bnx2x_link_test(bp, is_serdes) != 0) {
		buf[5] = 1;
		etest->flags \|= ETH_TEST_FL_FAILED;
		}

drivers/net/bnx2x/bnx2x_hsi.h

+105 −6

Original line number	Diff line number	Diff line
		@@ -238,7 +238,88 @@ struct port_hw_cfg { /* port 0: 0x12c port 1: 0x2bc */

		u16 xgxs_config_tx[4]; /* 0x1A0 */

		u32 Reserved1[64]; /* 0x1A8 */
		u32 Reserved1[57]; /* 0x1A8 */
		u32 speed_capability_mask2; /* 0x28C */
		#define PORT_HW_CFG_SPEED_CAPABILITY2_D3_MASK 0x0000FFFF
		#define PORT_HW_CFG_SPEED_CAPABILITY2_D3_SHIFT 0
		#define PORT_HW_CFG_SPEED_CAPABILITY2_D3_10M_FULL 0x00000001
		#define PORT_HW_CFG_SPEED_CAPABILITY2_D3__ 0x00000002
		#define PORT_HW_CFG_SPEED_CAPABILITY2_D3___ 0x00000004
		#define PORT_HW_CFG_SPEED_CAPABILITY2_D3_100M_FULL 0x00000008
		#define PORT_HW_CFG_SPEED_CAPABILITY2_D3_1G 0x00000010
		#define PORT_HW_CFG_SPEED_CAPABILITY2_D3_2_DOT_5G 0x00000020
		#define PORT_HW_CFG_SPEED_CAPABILITY2_D3_10G 0x00000040
		#define PORT_HW_CFG_SPEED_CAPABILITY2_D3_12G 0x00000080
		#define PORT_HW_CFG_SPEED_CAPABILITY2_D3_12_DOT_5G 0x00000100
		#define PORT_HW_CFG_SPEED_CAPABILITY2_D3_13G 0x00000200
		#define PORT_HW_CFG_SPEED_CAPABILITY2_D3_15G 0x00000400
		#define PORT_HW_CFG_SPEED_CAPABILITY2_D3_16G 0x00000800

		#define PORT_HW_CFG_SPEED_CAPABILITY2_D0_MASK 0xFFFF0000
		#define PORT_HW_CFG_SPEED_CAPABILITY2_D0_SHIFT 16
		#define PORT_HW_CFG_SPEED_CAPABILITY2_D0_10M_FULL 0x00010000
		#define PORT_HW_CFG_SPEED_CAPABILITY2_D0__ 0x00020000
		#define PORT_HW_CFG_SPEED_CAPABILITY2_D0___ 0x00040000
		#define PORT_HW_CFG_SPEED_CAPABILITY2_D0_100M_FULL 0x00080000
		#define PORT_HW_CFG_SPEED_CAPABILITY2_D0_1G 0x00100000
		#define PORT_HW_CFG_SPEED_CAPABILITY2_D0_2_DOT_5G 0x00200000
		#define PORT_HW_CFG_SPEED_CAPABILITY2_D0_10G 0x00400000
		#define PORT_HW_CFG_SPEED_CAPABILITY2_D0_12G 0x00800000
		#define PORT_HW_CFG_SPEED_CAPABILITY2_D0_12_DOT_5G 0x01000000
		#define PORT_HW_CFG_SPEED_CAPABILITY2_D0_13G 0x02000000
		#define PORT_HW_CFG_SPEED_CAPABILITY2_D0_15G 0x04000000
		#define PORT_HW_CFG_SPEED_CAPABILITY2_D0_16G 0x08000000

		/* In the case where two media types (e.g. copper and fiber) are
		present and electrically active at the same time, PHY Selection
		will determine which of the two PHYs will be designated as the
		Active PHY and used for a connection to the network. */
		u32 multi_phy_config; /* 0x290 */
		#define PORT_HW_CFG_PHY_SELECTION_MASK 0x00000007
		#define PORT_HW_CFG_PHY_SELECTION_SHIFT 0
		#define PORT_HW_CFG_PHY_SELECTION_HARDWARE_DEFAULT 0x00000000
		#define PORT_HW_CFG_PHY_SELECTION_FIRST_PHY 0x00000001
		#define PORT_HW_CFG_PHY_SELECTION_SECOND_PHY 0x00000002
		#define PORT_HW_CFG_PHY_SELECTION_FIRST_PHY_PRIORITY 0x00000003
		#define PORT_HW_CFG_PHY_SELECTION_SECOND_PHY_PRIORITY 0x00000004

		/* When enabled, all second phy nvram parameters will be swapped
		with the first phy parameters */
		#define PORT_HW_CFG_PHY_SWAPPED_MASK 0x00000008
		#define PORT_HW_CFG_PHY_SWAPPED_SHIFT 3
		#define PORT_HW_CFG_PHY_SWAPPED_DISABLED 0x00000000
		#define PORT_HW_CFG_PHY_SWAPPED_ENABLED 0x00000008


		/* Address of the second external phy */
		u32 external_phy_config2; /* 0x294 */
		#define PORT_HW_CFG_XGXS_EXT_PHY2_ADDR_MASK 0x000000FF
		#define PORT_HW_CFG_XGXS_EXT_PHY2_ADDR_SHIFT 0

		/* The second XGXS external PHY type */
		#define PORT_HW_CFG_XGXS_EXT_PHY2_TYPE_MASK 0x0000FF00
		#define PORT_HW_CFG_XGXS_EXT_PHY2_TYPE_SHIFT 8
		#define PORT_HW_CFG_XGXS_EXT_PHY2_TYPE_DIRECT 0x00000000
		#define PORT_HW_CFG_XGXS_EXT_PHY2_TYPE_BCM8071 0x00000100
		#define PORT_HW_CFG_XGXS_EXT_PHY2_TYPE_BCM8072 0x00000200
		#define PORT_HW_CFG_XGXS_EXT_PHY2_TYPE_BCM8073 0x00000300
		#define PORT_HW_CFG_XGXS_EXT_PHY2_TYPE_BCM8705 0x00000400
		#define PORT_HW_CFG_XGXS_EXT_PHY2_TYPE_BCM8706 0x00000500
		#define PORT_HW_CFG_XGXS_EXT_PHY2_TYPE_BCM8726 0x00000600
		#define PORT_HW_CFG_XGXS_EXT_PHY2_TYPE_BCM8481 0x00000700
		#define PORT_HW_CFG_XGXS_EXT_PHY2_TYPE_SFX7101 0x00000800
		#define PORT_HW_CFG_XGXS_EXT_PHY2_TYPE_BCM8727 0x00000900
		#define PORT_HW_CFG_XGXS_EXT_PHY2_TYPE_BCM8727_NOC 0x00000a00
		#define PORT_HW_CFG_XGXS_EXT_PHY2_TYPE_BCM84823 0x00000b00
		#define PORT_HW_CFG_XGXS_EXT_PHY2_TYPE_BCM54640 0x00000c00
		#define PORT_HW_CFG_XGXS_EXT_PHY2_TYPE_BCM84833 0x00000d00
		#define PORT_HW_CFG_XGXS_EXT_PHY2_TYPE_FAILURE 0x0000fd00
		#define PORT_HW_CFG_XGXS_EXT_PHY2_TYPE_NOT_CONN 0x0000ff00

		/* 4 times 16 bits for all 4 lanes. For some external PHYs (such as
		8706, 8726 and 8727) not all 4 values are needed. */
		u16 xgxs_config2_rx[4]; /* 0x296 */
		u16 xgxs_config2_tx[4]; /* 0x2A0 */

		u32 lane_config;
		#define PORT_HW_CFG_LANE_SWAP_CFG_MASK 0x0000ffff
		@@ -534,8 +615,15 @@ struct port_feat_cfg { /* port 0: 0x454 port 1: 0x4c8 */
		/* The default for MCP link configuration,
		uses the same defines as link_config */
		u32 mfw_wol_link_cfg;
		/* The default for the driver of the second external phy,
		uses the same defines as link_config */
		u32 link_config2; /* 0x47C */

		/* The default for MCP of the second external phy,
		uses the same defines as link_config */
		u32 mfw_wol_link_cfg2; /* 0x480 */

		u32 reserved[19];
		u32 Reserved2[17]; /* 0x484 */

		};

		@@ -703,8 +791,14 @@ struct drv_func_mb {
		* The optic module verification commands require bootcode
		* v5.0.6 or later
		*/
		#define DRV_MSG_CODE_VRFY_OPT_MDL 0xa0000000
		#define REQ_BC_VER_4_VRFY_OPT_MDL 0x00050006
		#define DRV_MSG_CODE_VRFY_FIRST_PHY_OPT_MDL 0xa0000000
		#define REQ_BC_VER_4_VRFY_FIRST_PHY_OPT_MDL 0x00050006
		/*
		* The specific optic module verification command requires bootcode
		* v5.2.12 or later
		*/
		#define DRV_MSG_CODE_VRFY_SPECIFIC_PHY_OPT_MDL 0xa1000000
		#define REQ_BC_VER_4_VRFY_SPECIFIC_PHY_OPT_MDL 0x00050234

		#define BIOS_MSG_CODE_LIC_CHALLENGE 0xff010000
		#define BIOS_MSG_CODE_LIC_RESPONSE 0xff020000
		@@ -939,7 +1033,12 @@ struct shmem2_region {
		#define SHMEM_DCC_SUPPORT_SET_PROTOCOL_TLV 0x00000040
		#define SHMEM_DCC_SUPPORT_SET_PRIORITY_TLV 0x00000080
		#define SHMEM_DCC_SUPPORT_DEFAULT SHMEM_DCC_SUPPORT_NONE

		u32 ext_phy_fw_version2[PORT_MAX];
		/*
		* For backwards compatibility, if the mf_cfg_addr does not exist
		* (the size filed is smaller than 0xc) the mf_cfg resides at the
		* end of struct shmem_region
		*/
		};