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Commit a1871112 authored by Eric Anholt's avatar Eric Anholt Committed by Keith Packard
Browse files

drm/i915: Use the LLC mode on gen6 for everything but display. 



Improves full-screen openarena on my laptop 20.3% +/- 4.0% (n=3)
Improves 800x600 nexuiz on my laptop 12.3% +/- 0.1% (n=3)

We have more room to improve with doing LLC caching for display using
GFDT, and in doing LLC+MLC caching, but this was an easy performance
win and incremental improvement toward those two.

Signed-off-by: default avatarEric Anholt <eric@anholt.net>
Signed-off-by: default avatarChris Wilson <chris@chris-wilson.co.uk>
Reviewed-by: default avatarDaniel Vetter <daniel.vetter@ffwll.ch>
parent a7ef0640

drivers/gpu/drm/i915/i915_gem.c

+17 −1
Original line number Original line Diff line number Diff line
@@ -3700,7 +3700,23 @@ struct drm_i915_gem_object *i915_gem_alloc_object(struct drm_device *dev, 
	obj->base.write_domain = I915_GEM_DOMAIN_CPU;

	obj->base.write_domain = I915_GEM_DOMAIN_CPU;

	obj->base.read_domains = I915_GEM_DOMAIN_CPU;

	obj->base.read_domains = I915_GEM_DOMAIN_CPU;





	if (IS_GEN6(dev)) {

		/* On Gen6, we can have the GPU use the LLC (the CPU

		 * cache) for about a 10% performance improvement

		 * compared to uncached.  Graphics requests other than

		 * display scanout are coherent with the CPU in

		 * accessing this cache.  This means in this mode we

		 * don't need to clflush on the CPU side, and on the

		 * GPU side we only need to flush internal caches to

		 * get data visible to the CPU.

		 *

		 * However, we maintain the display planes as UC, and so

		 * need to rebind when first used as such.

		 */

		obj->cache_level = I915_CACHE_LLC;

	} else

		obj->cache_level = I915_CACHE_NONE;

		obj->cache_level = I915_CACHE_NONE;



	obj->base.driver_private = NULL;

	obj->base.driver_private = NULL;

	obj->fence_reg = I915_FENCE_REG_NONE;

	obj->fence_reg = I915_FENCE_REG_NONE;

	INIT_LIST_HEAD(&obj->mm_list);

	INIT_LIST_HEAD(&obj->mm_list);