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Commit 9f3ba456 authored by Arnd Bergmann's avatar Arnd Bergmann
Browse files

ARM: tegra: make debug_ll code build for ARMv6 



In a combined ARMv6/v7 kernel, we cannot use the
movt/movw instructions to load an immediate, as they
are not valid on ARMv6.

This changes the file to use an indirect load instead,
as lots of other implementations do.

Signed-off-by: default avatarArnd Bergmann <arnd@arndb.de>
Tested-by: default avatarStephen Warren <swarren@wwwdotorg.org>
Acked-by: default avatarStephen Warren <swarren@wwwdotorg.org>
Cc: Thierry Reding <thierry.reding@gmail.com>
Cc: linux-tegra@vger.kernel.org
parent 1146b600

arch/arm/include/debug/tegra.S

+8 −10
Original line number Diff line number Diff line
@@ -53,8 +53,7 @@ 


#define checkuart(rp, rv, lhu, bit, uart) \

		/* Load address of CLK_RST register */ \

		movw	rp, #TEGRA_CLK_RST_DEVICES_##lhu & 0xffff ; \

		movt	rp, #TEGRA_CLK_RST_DEVICES_##lhu >> 16 ; \

		ldr	rp, =TEGRA_CLK_RST_DEVICES_##lhu ; \

		/* Load value from CLK_RST register */ \

		ldr	rp, [rp, #0] ; \

		/* Test UART's reset bit */ \
@@ -62,8 +61,7 @@ 
		/* If set, can't use UART; jump to save no UART */ \

		bne	90f ; \

		/* Load address of CLK_OUT_ENB register */ \

		movw	rp, #TEGRA_CLK_OUT_ENB_##lhu & 0xffff ; \

		movt	rp, #TEGRA_CLK_OUT_ENB_##lhu >> 16 ; \

		ldr	rp, =TEGRA_CLK_OUT_ENB_##lhu ; \

		/* Load value from CLK_OUT_ENB register */ \

		ldr	rp, [rp, #0] ; \

		/* Test UART's clock enable bit */ \
@@ -71,8 +69,7 @@ 
		/* If clear, can't use UART; jump to save no UART */ \

		beq	90f ; \

		/* Passed all tests, load address of UART registers */ \

		movw	rp, #TEGRA_UART##uart##_BASE & 0xffff ; \

		movt	rp, #TEGRA_UART##uart##_BASE >> 16 ; \

		ldr	rp, =TEGRA_UART##uart##_BASE ; \

		/* Jump to save UART address */ \

		b 91f
@@ -90,15 +87,16 @@ 


#ifdef CONFIG_TEGRA_DEBUG_UART_AUTO_ODMDATA

		/* Check ODMDATA */

10:		movw	\rp, #TEGRA_PMC_SCRATCH20 & 0xffff

		movt	\rp, #TEGRA_PMC_SCRATCH20 >> 16

10:		ldr	\rp, =TEGRA_PMC_SCRATCH20

		ldr	\rp, [\rp, #0]		@ Load PMC_SCRATCH20

		ubfx	\rv, \rp, #18, #2	@ 19:18 are console type

		lsr	\rv, \rp, #18		@ 19:18 are console type

		and	\rv, \rv, #3

		cmp	\rv, #2			@ 2 and 3 mean DCC, UART

		beq	11f			@ some boards swap the meaning

		cmp	\rv, #3			@ so accept either

		bne	90f

11:		ubfx	\rv, \rp, #15, #3	@ 17:15 are UART ID

11:		lsr	\rv, \rp, #15		@ 17:15 are UART ID

		and	\rv, #7	

		cmp	\rv, #0			@ UART 0?

		beq	20f

		cmp	\rv, #1			@ UART 1?