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Commit 9f19010a authored by Jacob Shin's avatar Jacob Shin Committed by Ingo Molnar
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perf/x86/amd: Use proper naming scheme for AMD bit field definitions 



Update these AMD bit field names to be consistent with naming
convention followed by the rest of the file.

Signed-off-by: default avatarJacob Shin <jacob.shin@amd.com>
Acked-by: default avatarStephane Eranian <eranian@google.com>
Cc: Paul Mackerras <paulus@samba.org>
Cc: Arnaldo Carvalho de Melo <acme@ghostprotocols.net>
Cc: Jiri Olsa <jolsa@redhat.com>
Cc: Peter Zijlstra <a.p.zijlstra@chello.nl>
Link: http://lkml.kernel.org/r/1360171589-6381-4-git-send-email-jacob.shin@amd.com


Signed-off-by: default avatarIngo Molnar <mingo@kernel.org>
parent 4dd4c2ae

arch/x86/include/asm/perf_event.h

+2 −2
Original line number Diff line number Diff line
@@ -29,8 +29,8 @@ 
#define ARCH_PERFMON_EVENTSEL_INV			(1ULL << 23)

#define ARCH_PERFMON_EVENTSEL_CMASK			0xFF000000ULL



#define AMD_PERFMON_EVENTSEL_GUESTONLY			(1ULL << 40)

#define AMD_PERFMON_EVENTSEL_HOSTONLY			(1ULL << 41)

#define AMD64_EVENTSEL_GUESTONLY			(1ULL << 40)

#define AMD64_EVENTSEL_HOSTONLY				(1ULL << 41)



#define AMD64_EVENTSEL_EVENT	\

	(ARCH_PERFMON_EVENTSEL_EVENT | (0x0FULL << 32))

arch/x86/kernel/cpu/perf_event_amd.c

+4 −4
Original line number Diff line number Diff line
@@ -156,9 +156,9 @@ static int amd_pmu_hw_config(struct perf_event *event) 
		event->hw.config &= ~(ARCH_PERFMON_EVENTSEL_USR |

				      ARCH_PERFMON_EVENTSEL_OS);

	else if (event->attr.exclude_host)

		event->hw.config |= AMD_PERFMON_EVENTSEL_GUESTONLY;

		event->hw.config |= AMD64_EVENTSEL_GUESTONLY;

	else if (event->attr.exclude_guest)

		event->hw.config |= AMD_PERFMON_EVENTSEL_HOSTONLY;

		event->hw.config |= AMD64_EVENTSEL_HOSTONLY;



	if (event->attr.type != PERF_TYPE_RAW)

		return 0;
@@ -336,7 +336,7 @@ static void amd_pmu_cpu_starting(int cpu) 
	struct amd_nb *nb;

	int i, nb_id;



	cpuc->perf_ctr_virt_mask = AMD_PERFMON_EVENTSEL_HOSTONLY;

	cpuc->perf_ctr_virt_mask = AMD64_EVENTSEL_HOSTONLY;



	if (boot_cpu_data.x86_max_cores < 2)

		return;
@@ -669,7 +669,7 @@ void amd_pmu_disable_virt(void) 
	 * SVM is disabled the Guest-only bits still gets set and the counter

	 * will not count anything.

	 */

	cpuc->perf_ctr_virt_mask = AMD_PERFMON_EVENTSEL_HOSTONLY;

	cpuc->perf_ctr_virt_mask = AMD64_EVENTSEL_HOSTONLY;



	/* Reload all events */

	x86_pmu_disable_all();