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Commit 9cb6d363 authored by Tero Kristo's avatar Tero Kristo
Browse files

ARM: OMAP2+: PRM: add generic API for clear_mod_irqs 



OMAP2/3 now use generic API for the prm_clear_mod_irqs, the SoC specific
implementation details are provided through prm_ll_data.

Signed-off-by: default avatarTero Kristo <t-kristo@ti.com>
parent f0caa527

arch/arm/mach-omap2/pm24xx.c

+11 −13
Original line number Diff line number Diff line
@@ -75,9 +75,9 @@ static int omap2_enter_full_retention(void) 


	/* Clear old wake-up events */

	/* REVISIT: These write to reserved bits? */

	omap2xxx_prm_clear_mod_irqs(CORE_MOD, PM_WKST1, ~0);

	omap2xxx_prm_clear_mod_irqs(CORE_MOD, OMAP24XX_PM_WKST2, ~0);

	omap2xxx_prm_clear_mod_irqs(WKUP_MOD, PM_WKST, ~0);

	omap_prm_clear_mod_irqs(CORE_MOD, PM_WKST1, ~0);

	omap_prm_clear_mod_irqs(CORE_MOD, OMAP24XX_PM_WKST2, ~0);

	omap_prm_clear_mod_irqs(WKUP_MOD, PM_WKST, ~0);



	pwrdm_set_next_pwrst(core_pwrdm, PWRDM_POWER_RET);

	pwrdm_set_next_pwrst(mpu_pwrdm, PWRDM_POWER_RET);
@@ -104,18 +104,16 @@ static int omap2_enter_full_retention(void) 
	clk_enable(osc_ck);



	/* clear CORE wake-up events */

	omap2xxx_prm_clear_mod_irqs(CORE_MOD, PM_WKST1, ~0);

	omap2xxx_prm_clear_mod_irqs(CORE_MOD, OMAP24XX_PM_WKST2, ~0);

	omap_prm_clear_mod_irqs(CORE_MOD, PM_WKST1, ~0);

	omap_prm_clear_mod_irqs(CORE_MOD, OMAP24XX_PM_WKST2, ~0);



	/* wakeup domain events - bit 1: GPT1, bit5 GPIO */

	omap2xxx_prm_clear_mod_irqs(WKUP_MOD, PM_WKST, 0x4 | 0x1);

	omap_prm_clear_mod_irqs(WKUP_MOD, PM_WKST, 0x4 | 0x1);



	/* MPU domain wake events */

	omap2xxx_prm_clear_mod_irqs(OCP_MOD, OMAP2_PRCM_IRQSTATUS_MPU_OFFSET,

				    0x1);

	omap_prm_clear_mod_irqs(OCP_MOD, OMAP2_PRCM_IRQSTATUS_MPU_OFFSET, 0x1);



	omap2xxx_prm_clear_mod_irqs(OCP_MOD, OMAP2_PRCM_IRQSTATUS_MPU_OFFSET,

				    0x20);

	omap_prm_clear_mod_irqs(OCP_MOD, OMAP2_PRCM_IRQSTATUS_MPU_OFFSET, 0x20);



	pwrdm_set_next_pwrst(mpu_pwrdm, PWRDM_POWER_ON);

	pwrdm_set_next_pwrst(core_pwrdm, PWRDM_POWER_ON);
@@ -143,9 +141,9 @@ static void omap2_enter_mpu_retention(void) 
	 * it is in retention mode. */

	if (omap2_allow_mpu_retention()) {

		/* REVISIT: These write to reserved bits? */

		omap2xxx_prm_clear_mod_irqs(CORE_MOD, PM_WKST1, ~0);

		omap2xxx_prm_clear_mod_irqs(CORE_MOD, OMAP24XX_PM_WKST2, ~0);

		omap2xxx_prm_clear_mod_irqs(WKUP_MOD, PM_WKST, ~0);

		omap_prm_clear_mod_irqs(CORE_MOD, PM_WKST1, ~0);

		omap_prm_clear_mod_irqs(CORE_MOD, OMAP24XX_PM_WKST2, ~0);

		omap_prm_clear_mod_irqs(WKUP_MOD, PM_WKST, ~0);



		/* Try to enter MPU retention */

		pwrdm_set_next_pwrst(mpu_pwrdm, PWRDM_POWER_RET);

arch/arm/mach-omap2/pm34xx.c

+8 −10
Original line number Diff line number Diff line
@@ -137,7 +137,7 @@ static irqreturn_t _prcm_int_handle_io(int irq, void *unused) 
{

	int c;



	c = omap3xxx_prm_clear_mod_irqs(WKUP_MOD, 1, OMAP3430_ST_IO_MASK |

	c = omap_prm_clear_mod_irqs(WKUP_MOD, 1, OMAP3430_ST_IO_MASK |

				    OMAP3430_ST_IO_CHAIN_MASK);



	return c ? IRQ_HANDLED : IRQ_NONE;
@@ -152,15 +152,13 @@ static irqreturn_t _prcm_int_handle_wakeup(int irq, void *unused) 
	 * these are handled in a separate handler to avoid acking

	 * IO events before parsing in mux code

	 */

	c = omap3xxx_prm_clear_mod_irqs(WKUP_MOD, 1,

					~(OMAP3430_ST_IO_MASK |

	c = omap_prm_clear_mod_irqs(WKUP_MOD, 1, ~(OMAP3430_ST_IO_MASK |

						   OMAP3430_ST_IO_CHAIN_MASK));

	c += omap3xxx_prm_clear_mod_irqs(CORE_MOD, 1, ~0);

	c += omap3xxx_prm_clear_mod_irqs(OMAP3430_PER_MOD, 1, ~0);

	c += omap_prm_clear_mod_irqs(CORE_MOD, 1, ~0);

	c += omap_prm_clear_mod_irqs(OMAP3430_PER_MOD, 1, ~0);

	if (omap_rev() > OMAP3430_REV_ES1_0) {

		c += omap3xxx_prm_clear_mod_irqs(CORE_MOD, 3, ~0);

		c += omap3xxx_prm_clear_mod_irqs(OMAP3430ES2_USBHOST_MOD, 1,

						 ~0);

		c += omap_prm_clear_mod_irqs(CORE_MOD, 3, ~0);

		c += omap_prm_clear_mod_irqs(OMAP3430ES2_USBHOST_MOD, 1, ~0);

	}



	return c ? IRQ_HANDLED : IRQ_NONE;

arch/arm/mach-omap2/prm.h

+2 −0
Original line number Diff line number Diff line
@@ -146,6 +146,7 @@ struct prm_ll_data { 
	int (*is_hardreset_asserted)(u8 shift, u8 part, s16 prm_mod,

				     u16 offset);

	void (*reset_system)(void);

	int (*clear_mod_irqs)(s16 module, u8 regs, u32 wkst_mask);

};



extern int prm_register(struct prm_ll_data *pld);
@@ -161,6 +162,7 @@ extern void prm_clear_context_loss_flags_old(u8 part, s16 inst, u16 idx); 
void omap_prm_reset_system(void);



void omap_prm_reconfigure_io_chain(void);

int omap_prm_clear_mod_irqs(s16 module, u8 regs, u32 wkst_mask);



#endif

arch/arm/mach-omap2/prm2xxx.c

+3 −1
Original line number Diff line number Diff line
@@ -123,13 +123,14 @@ static void omap2xxx_prm_dpll_reset(void) 
 * Clears wakeup status bits for a given module, so that the device can

 * re-enter idle.

 */

void omap2xxx_prm_clear_mod_irqs(s16 module, u8 regs, u32 wkst_mask)

static int omap2xxx_prm_clear_mod_irqs(s16 module, u8 regs, u32 wkst_mask)

{

	u32 wkst;



	wkst = omap2_prm_read_mod_reg(module, regs);

	wkst &= wkst_mask;

	omap2_prm_write_mod_reg(wkst, module, regs);

	return 0;

}



int omap2xxx_clkdm_sleep(struct clockdomain *clkdm)
@@ -216,6 +217,7 @@ static struct prm_ll_data omap2xxx_prm_ll_data = { 
	.deassert_hardreset = &omap2_prm_deassert_hardreset,

	.is_hardreset_asserted = &omap2_prm_is_hardreset_asserted,

	.reset_system = &omap2xxx_prm_dpll_reset,

	.clear_mod_irqs = &omap2xxx_prm_clear_mod_irqs,

};



int __init omap2xxx_prm_init(void)

arch/arm/mach-omap2/prm2xxx.h

+0 −2
Original line number Diff line number Diff line
@@ -124,8 +124,6 @@ 
extern int omap2xxx_clkdm_sleep(struct clockdomain *clkdm);

extern int omap2xxx_clkdm_wakeup(struct clockdomain *clkdm);



void omap2xxx_prm_clear_mod_irqs(s16 module, u8 regs, u32 wkst_mask);



extern int __init omap2xxx_prm_init(void);



#endif