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Commit 9a6cb70f authored by Georgi Djakov's avatar Georgi Djakov Committed by Michael Turquette
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clk: qcom: Fix duplicate rbcpr clock name



There is a duplication in a clock name for apq8084 platform that causes
the following warning: "RBCPR_CLK_SRC" redefined

Resolve this by adding a MMSS_ prefix to this clock and making its name
coherent with msm8974 platform.

Fixes: 2b46cd23 ("clk: qcom: Add APQ8084 Multimedia Clock Controller (MMCC) support")
Signed-off-by: default avatarGeorgi Djakov <gdjakov@mm-sol.com>
Reviewed-by: default avatarStephen Boyd <sboyd@codeaurora.org>
Signed-off-by: default avatarMichael Turquette <mturquette@linaro.org>
parent 69daf75a
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+1 −1
Original line number Diff line number Diff line
@@ -3122,7 +3122,7 @@ static struct clk_regmap *mmcc_apq8084_clocks[] = {
	[ESC1_CLK_SRC] = &esc1_clk_src.clkr,
	[HDMI_CLK_SRC] = &hdmi_clk_src.clkr,
	[VSYNC_CLK_SRC] = &vsync_clk_src.clkr,
	[RBCPR_CLK_SRC] = &rbcpr_clk_src.clkr,
	[MMSS_RBCPR_CLK_SRC] = &rbcpr_clk_src.clkr,
	[RBBMTIMER_CLK_SRC] = &rbbmtimer_clk_src.clkr,
	[MAPLE_CLK_SRC] = &maple_clk_src.clkr,
	[VDP_CLK_SRC] = &vdp_clk_src.clkr,
+1 −1
Original line number Diff line number Diff line
@@ -60,7 +60,7 @@
#define ESC1_CLK_SRC			43
#define HDMI_CLK_SRC			44
#define VSYNC_CLK_SRC			45
#define RBCPR_CLK_SRC			46
#define MMSS_RBCPR_CLK_SRC		46
#define RBBMTIMER_CLK_SRC		47
#define MAPLE_CLK_SRC			48
#define VDP_CLK_SRC			49