Donate to e Foundation | Murena handsets with /e/OS | Own a part of Murena! Learn more

Commit 99c1745b authored by Will Deacon's avatar Will Deacon Committed by Russell King
Browse files

ARM: 7355/1: perf: clear overflow flag when disabling counter on ARMv7 PMU



When disabling a counter on an ARMv7 PMU, we should also clear the
overflow flag in case an overflow occurred whilst stopping the counter.
This prevents a spurious overflow being picked up later and leading to
either false accounting or a NULL dereference.

Cc: <stable@vger.kernel.org>
Reported-by: default avatarMing Lei <tom.leiming@gmail.com>
Signed-off-by: default avatarWill Deacon <will.deacon@arm.com>
Signed-off-by: default avatarRussell King <rmk+kernel@arm.linux.org.uk>
parent 57273471
Loading
Loading
Loading
Loading
+5 −0
Original line number Diff line number Diff line
@@ -809,6 +809,11 @@ static inline int armv7_pmnc_disable_intens(int idx)

	counter = ARMV7_IDX_TO_COUNTER(idx);
	asm volatile("mcr p15, 0, %0, c9, c14, 2" : : "r" (BIT(counter)));
	isb();
	/* Clear the overflow flag in case an interrupt is pending. */
	asm volatile("mcr p15, 0, %0, c9, c12, 3" : : "r" (BIT(counter)));
	isb();

	return idx;
}