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Commit 97b09da4 authored by Arnd Bergmann's avatar Arnd Bergmann Committed by Eric Miao
Browse files

ARM: pxa: use correct __iomem annotations 



This tries to clear up the confusion between integers and iomem pointers
in the marvell pxa platform. MMIO addresses are supposed to be __iomem*
values, in order to let the Linux type checking work correctly. This
patch moves the cast to __iomem as far back as possible, to the place
where the MMIO virtual address windows are defined.

Signed-off-by: default avatarArnd Bergmann <arnd@arndb.de>
Signed-off-by: default avatarEric Miao <eric.y.miao@gmail.com>
parent 7272889d

arch/arm/include/asm/hardware/it8152.h

+1 −1
Original line number Diff line number Diff line
@@ -9,7 +9,7 @@ 


#ifndef __ASM_HARDWARE_IT8152_H

#define __ASM_HARDWARE_IT8152_H

extern unsigned long it8152_base_address;

extern void __iomem *it8152_base_address;



#define IT8152_IO_BASE			(it8152_base_address + 0x03e00000)

#define IT8152_CFGREG_BASE		(it8152_base_address + 0x03f00000)

arch/arm/mach-mmp/clock.h

+4 −4
Original line number Diff line number Diff line
@@ -30,7 +30,7 @@ extern struct clkops apmu_clk_ops; 


#define APBC_CLK(_name, _reg, _fnclksel, _rate)			\

struct clk clk_##_name = {					\

		.clk_rst	= (void __iomem *)APBC_##_reg,	\

		.clk_rst	= APBC_##_reg,			\

		.fnclksel	= _fnclksel,			\

		.rate		= _rate,			\

		.ops		= &apbc_clk_ops,		\
@@ -38,7 +38,7 @@ struct clk clk_##_name = { \ 


#define APBC_CLK_OPS(_name, _reg, _fnclksel, _rate, _ops)	\

struct clk clk_##_name = {					\

		.clk_rst	= (void __iomem *)APBC_##_reg,	\

		.clk_rst	= APBC_##_reg,			\

		.fnclksel	= _fnclksel,			\

		.rate		= _rate,			\

		.ops		= _ops,				\
@@ -46,7 +46,7 @@ struct clk clk_##_name = { \ 


#define APMU_CLK(_name, _reg, _eval, _rate)			\

struct clk clk_##_name = {					\

		.clk_rst	= (void __iomem *)APMU_##_reg,	\

		.clk_rst	= APMU_##_reg,			\

		.enable_val	= _eval,			\

		.rate		= _rate,			\

		.ops		= &apmu_clk_ops,		\
@@ -54,7 +54,7 @@ struct clk clk_##_name = { \ 


#define APMU_CLK_OPS(_name, _reg, _eval, _rate, _ops)		\

struct clk clk_##_name = {					\

		.clk_rst	= (void __iomem *)APMU_##_reg,	\

		.clk_rst	= APMU_##_reg,			\

		.enable_val	= _eval,			\

		.rate		= _rate,			\

		.ops		= _ops,				\

arch/arm/mach-mmp/common.c

+2 −2
Original line number Diff line number Diff line
@@ -27,12 +27,12 @@ EXPORT_SYMBOL(mmp_chip_id); 
static struct map_desc standard_io_desc[] __initdata = {

	{

		.pfn		= __phys_to_pfn(APB_PHYS_BASE),

		.virtual	= APB_VIRT_BASE,

		.virtual	= (unsigned long)APB_VIRT_BASE,

		.length		= APB_PHYS_SIZE,

		.type		= MT_DEVICE,

	}, {

		.pfn		= __phys_to_pfn(AXI_PHYS_BASE),

		.virtual	= AXI_VIRT_BASE,

		.virtual	= (unsigned long)AXI_VIRT_BASE,

		.length		= AXI_PHYS_SIZE,

		.type		= MT_DEVICE,

	},

arch/arm/mach-mmp/include/mach/addr-map.h

+8 −2
Original line number Diff line number Diff line
@@ -11,6 +11,12 @@ 
#ifndef __ASM_MACH_ADDR_MAP_H

#define __ASM_MACH_ADDR_MAP_H



#ifndef __ASSEMBLER__

#define IOMEM(x)	((void __iomem *)(x))

#else

#define IOMEM(x)	(x)

#endif



/* APB - Application Subsystem Peripheral Bus

 *

 * NOTE: the DMA controller registers are actually on the AXI fabric #1
@@ -18,11 +24,11 @@ 
 * peripherals on APB, let's count it into the ABP mapping area.

 */

#define APB_PHYS_BASE		0xd4000000

#define APB_VIRT_BASE		0xfe000000

#define APB_VIRT_BASE		IOMEM(0xfe000000)

#define APB_PHYS_SIZE		0x00200000



#define AXI_PHYS_BASE		0xd4200000

#define AXI_VIRT_BASE		0xfe200000

#define AXI_VIRT_BASE		IOMEM(0xfe200000)

#define AXI_PHYS_SIZE		0x00200000



/* Static Memory Controller - Chip Select 0 and 1 */

arch/arm/mach-mmp/mmp2.c

+2 −1
Original line number Diff line number Diff line
@@ -87,7 +87,8 @@ static struct mfp_addr_map mmp2_addr_map[] __initdata = { 


void mmp2_clear_pmic_int(void)

{

	unsigned long mfpr_pmic, data;

	void __iomem *mfpr_pmic;

	unsigned long data;



	mfpr_pmic = APB_VIRT_BASE + 0x1e000 + 0x2c4;

	data = __raw_readl(mfpr_pmic);