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Commit 952f72a8 authored by Alexander Duyck's avatar Alexander Duyck Committed by David S. Miller
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igb: move SRRCTL register configuration into ring specific config 



The SRRCTL register exists per ring.  Instead of configuring all of them in
the RCTL configuration which is meant to be global it makes more sense to move
this out into the ring specific configuration.

Signed-off-by: default avatarAlexander Duyck <alexander.h.duyck@intel.com>
Signed-off-by: default avatarJeff Kirsher <jeffrey.t.kirsher@intel.com>
Signed-off-by: default avatarDavid S. Miller <davem@davemloft.net>
parent 6ec43fe6

drivers/net/igb/igb_main.c

+23 −37
Original line number Original line Diff line number Diff line
@@ -2230,8 +2230,6 @@ static void igb_setup_rctl(struct igb_adapter *adapter) 
{

{

	struct e1000_hw *hw = &adapter->hw;

	struct e1000_hw *hw = &adapter->hw;

	u32 rctl;

	u32 rctl;

	u32 srrctl = 0;

	int i;





	rctl = rd32(E1000_RCTL);

	rctl = rd32(E1000_RCTL);
@@ -2256,31 +2254,8 @@ static void igb_setup_rctl(struct igb_adapter *adapter) 
	/* enable LPE to prevent packets larger than max_frame_size */

	/* enable LPE to prevent packets larger than max_frame_size */

	rctl |= E1000_RCTL_LPE;

	rctl |= E1000_RCTL_LPE;





	/* 82575 and greater support packet-split where the protocol

	/* disable queue 0 to prevent tail write w/o re-config */

	 * header is placed in skb->data and the packet data is

	wr32(E1000_RXDCTL(0), 0);

	 * placed in pages hanging off of skb_shinfo(skb)->nr_frags.

	 * In the case of a non-split, skb->data is linearly filled,

	 * followed by the page buffers.  Therefore, skb->data is

	 * sized to hold the largest protocol header.

	 */

	/* allocations using alloc_page take too long for regular MTU

	 * so only enable packet split for jumbo frames */

	if (adapter->rx_buffer_len < IGB_RXBUFFER_1024) {

		srrctl = ALIGN(adapter->rx_buffer_len, 64) <<

		         E1000_SRRCTL_BSIZEHDRSIZE_SHIFT;

#if (PAGE_SIZE / 2) > IGB_RXBUFFER_16384

		srrctl |= IGB_RXBUFFER_16384 >>

		          E1000_SRRCTL_BSIZEPKT_SHIFT;

#else

		srrctl |= (PAGE_SIZE / 2) >>

		          E1000_SRRCTL_BSIZEPKT_SHIFT;

#endif

		srrctl |= E1000_SRRCTL_DESCTYPE_HDR_SPLIT_ALWAYS;

	} else {

		srrctl = ALIGN(adapter->rx_buffer_len, 1024) >>

		         E1000_SRRCTL_BSIZEPKT_SHIFT;

		srrctl |= E1000_SRRCTL_DESCTYPE_ADV_ONEBUF;

	}





	/* Attention!!!  For SR-IOV PF driver operations you must enable

	/* Attention!!!  For SR-IOV PF driver operations you must enable

	 * queue drop for all VF and PF queues to prevent head of line blocking

	 * queue drop for all VF and PF queues to prevent head of line blocking
@@ -2291,10 +2266,6 @@ static void igb_setup_rctl(struct igb_adapter *adapter) 




		/* set all queue drop enable bits */

		/* set all queue drop enable bits */

		wr32(E1000_QDE, ALL_QUEUES);

		wr32(E1000_QDE, ALL_QUEUES);

		srrctl |= E1000_SRRCTL_DROP_EN;



		/* disable queue 0 to prevent tail write w/o re-config */

		wr32(E1000_RXDCTL(0), 0);





		vmolr = rd32(E1000_VMOLR(adapter->vfs_allocated_count));

		vmolr = rd32(E1000_VMOLR(adapter->vfs_allocated_count));

		if (rctl & E1000_RCTL_LPE)

		if (rctl & E1000_RCTL_LPE)
@@ -2304,11 +2275,6 @@ static void igb_setup_rctl(struct igb_adapter *adapter) 
		wr32(E1000_VMOLR(adapter->vfs_allocated_count), vmolr);

		wr32(E1000_VMOLR(adapter->vfs_allocated_count), vmolr);

	}

	}





	for (i = 0; i < adapter->num_rx_queues; i++) {

		int j = adapter->rx_ring[i].reg_idx;

		wr32(E1000_SRRCTL(j), srrctl);

	}



	wr32(E1000_RCTL, rctl);

	wr32(E1000_RCTL, rctl);

}

}
@@ -2373,7 +2339,7 @@ static void igb_configure_rx_ring(struct igb_adapter *adapter, 
	struct e1000_hw *hw = &adapter->hw;

	struct e1000_hw *hw = &adapter->hw;

	u64 rdba = ring->dma;

	u64 rdba = ring->dma;

	int reg_idx = ring->reg_idx;

	int reg_idx = ring->reg_idx;

	u32 rxdctl;

	u32 srrctl, rxdctl;





	/* disable the queue */

	/* disable the queue */

	rxdctl = rd32(E1000_RXDCTL(reg_idx));

	rxdctl = rd32(E1000_RXDCTL(reg_idx));
@@ -2393,6 +2359,26 @@ static void igb_configure_rx_ring(struct igb_adapter *adapter, 
	writel(0, hw->hw_addr + ring->head);

	writel(0, hw->hw_addr + ring->head);

	writel(0, hw->hw_addr + ring->tail);

	writel(0, hw->hw_addr + ring->tail);





	/* set descriptor configuration */

	if (adapter->rx_buffer_len < IGB_RXBUFFER_1024) {

		srrctl = ALIGN(adapter->rx_buffer_len, 64) <<

		         E1000_SRRCTL_BSIZEHDRSIZE_SHIFT;

#if (PAGE_SIZE / 2) > IGB_RXBUFFER_16384

		srrctl |= IGB_RXBUFFER_16384 >>

		          E1000_SRRCTL_BSIZEPKT_SHIFT;

#else

		srrctl |= (PAGE_SIZE / 2) >>

		          E1000_SRRCTL_BSIZEPKT_SHIFT;

#endif

		srrctl |= E1000_SRRCTL_DESCTYPE_HDR_SPLIT_ALWAYS;

	} else {

		srrctl = ALIGN(adapter->rx_buffer_len, 1024) >>

		         E1000_SRRCTL_BSIZEPKT_SHIFT;

		srrctl |= E1000_SRRCTL_DESCTYPE_ADV_ONEBUF;

	}



	wr32(E1000_SRRCTL(reg_idx), srrctl);



	/* enable receive descriptor fetching */

	/* enable receive descriptor fetching */

	rxdctl = rd32(E1000_RXDCTL(reg_idx));

	rxdctl = rd32(E1000_RXDCTL(reg_idx));

	rxdctl |= E1000_RXDCTL_QUEUE_ENABLE;

	rxdctl |= E1000_RXDCTL_QUEUE_ENABLE;