clk: qcom: Add MSM8916 iommu clocks (93e71695) · Commits · e / devices / android_kernel_teracube_2e

drivers/clk/qcom/gcc-msm8916.c

+48 −0

Original line number	Diff line number	Diff line
		@@ -2347,6 +2347,51 @@ static struct clk_branch gcc_sdcc2_apps_clk = {
		},
		};

		static struct clk_rcg2 bimc_ddr_clk_src = {
		.cmd_rcgr = 0x32004,
		.hid_width = 5,
		.parent_map = gcc_xo_gpll0_bimc_map,
		.clkr.hw.init = &(struct clk_init_data){
		.name = "bimc_ddr_clk_src",
		.parent_names = gcc_xo_gpll0_bimc,
		.num_parents = 3,
		.ops = &clk_rcg2_ops,
		.flags = CLK_GET_RATE_NOCACHE,
		},
		};

		static struct clk_branch gcc_apss_tcu_clk = {
		.halt_reg = 0x12018,
		.clkr = {
		.enable_reg = 0x4500c,
		.enable_mask = BIT(1),
		.hw.init = &(struct clk_init_data){
		.name = "gcc_apss_tcu_clk",
		.parent_names = (const char *[]){
		"bimc_ddr_clk_src",
		},
		.num_parents = 1,
		.ops = &clk_branch2_ops,
		},
		},
		};

		static struct clk_branch gcc_gfx_tcu_clk = {
		.halt_reg = 0x12020,
		.clkr = {
		.enable_reg = 0x4500c,
		.enable_mask = BIT(2),
		.hw.init = &(struct clk_init_data){
		.name = "gcc_gfx_tcu_clk",
		.parent_names = (const char *[]){
		"bimc_ddr_clk_src",
		},
		.num_parents = 1,
		.ops = &clk_branch2_ops,
		},
		},
		};

		static struct clk_branch gcc_gtcu_ahb_clk = {
		.halt_reg = 0x12044,
		.clkr = {
		@@ -2730,6 +2775,9 @@ static struct clk_regmap *gcc_msm8916_clocks[] = {
		[GCC_VENUS0_AHB_CLK] = &gcc_venus0_ahb_clk.clkr,
		[GCC_VENUS0_AXI_CLK] = &gcc_venus0_axi_clk.clkr,
		[GCC_VENUS0_VCODEC0_CLK] = &gcc_venus0_vcodec0_clk.clkr,
		[BIMC_DDR_CLK_SRC] = &bimc_ddr_clk_src.clkr,
		[GCC_APSS_TCU_CLK] = &gcc_apss_tcu_clk.clkr,
		[GCC_GFX_TCU_CLK] = &gcc_gfx_tcu_clk.clkr,
		};

		static struct gdsc *gcc_msm8916_gdscs[] = {

+3 −0