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Commit 92e5b0a2 authored by Ilia Mirkin's avatar Ilia Mirkin Committed by Ben Skeggs
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drm/nv10/plane: fix format computation 



Otherwise none of the format checks pass, since the width was still in
16.16 encoding.

Signed-off-by: default avatarIlia Mirkin <imirkin@alum.mit.edu>
Signed-off-by: default avatarBen Skeggs <bskeggs@redhat.com>
parent 5b19f4f9

drivers/gpu/drm/nouveau/dispnv04/overlay.c

+9 −8
Original line number Diff line number Diff line
@@ -99,10 +99,17 @@ nv10_update_plane(struct drm_plane *plane, struct drm_crtc *crtc, 
	struct nouveau_crtc *nv_crtc = nouveau_crtc(crtc);

	struct nouveau_bo *cur = nv_plane->cur;

	bool flip = nv_plane->flip;

	int format = ALIGN(src_w * 4, 0x100);

	int soff = NV_PCRTC0_SIZE * nv_crtc->index;

	int soff2 = NV_PCRTC0_SIZE * !nv_crtc->index;

	int ret;

	int format, ret;



	/* Source parameters given in 16.16 fixed point, ignore fractional. */

	src_x >>= 16;

	src_y >>= 16;

	src_w >>= 16;

	src_h >>= 16;



	format = ALIGN(src_w * 4, 0x100);



	if (format > 0xffff)

		return -EINVAL;
@@ -113,12 +120,6 @@ nv10_update_plane(struct drm_plane *plane, struct drm_crtc *crtc, 


	nv_plane->cur = nv_fb->nvbo;



	/* Source parameters given in 16.16 fixed point, ignore fractional. */

	src_x = src_x >> 16;

	src_y = src_y >> 16;

	src_w = src_w >> 16;

	src_h = src_h >> 16;



	nv_mask(dev, NV_PCRTC_ENGINE_CTRL + soff, NV_CRTC_FSEL_OVERLAY, NV_CRTC_FSEL_OVERLAY);

	nv_mask(dev, NV_PCRTC_ENGINE_CTRL + soff2, NV_CRTC_FSEL_OVERLAY, 0);