Loading include/asm-i386/bitops.h +12 −12 Original line number Original line Diff line number Diff line Loading @@ -43,7 +43,7 @@ static inline void set_bit(int nr, volatile unsigned long * addr) { { __asm__ __volatile__( LOCK_PREFIX __asm__ __volatile__( LOCK_PREFIX "btsl %1,%0" "btsl %1,%0" :"=m" (ADDR) :"+m" (ADDR) :"Ir" (nr)); :"Ir" (nr)); } } Loading @@ -60,7 +60,7 @@ static inline void __set_bit(int nr, volatile unsigned long * addr) { { __asm__( __asm__( "btsl %1,%0" "btsl %1,%0" :"=m" (ADDR) :"+m" (ADDR) :"Ir" (nr)); :"Ir" (nr)); } } Loading @@ -78,7 +78,7 @@ static inline void clear_bit(int nr, volatile unsigned long * addr) { { __asm__ __volatile__( LOCK_PREFIX __asm__ __volatile__( LOCK_PREFIX "btrl %1,%0" "btrl %1,%0" :"=m" (ADDR) :"+m" (ADDR) :"Ir" (nr)); :"Ir" (nr)); } } Loading @@ -86,7 +86,7 @@ static inline void __clear_bit(int nr, volatile unsigned long * addr) { { __asm__ __volatile__( __asm__ __volatile__( "btrl %1,%0" "btrl %1,%0" :"=m" (ADDR) :"+m" (ADDR) :"Ir" (nr)); :"Ir" (nr)); } } #define smp_mb__before_clear_bit() barrier() #define smp_mb__before_clear_bit() barrier() Loading @@ -105,7 +105,7 @@ static inline void __change_bit(int nr, volatile unsigned long * addr) { { __asm__ __volatile__( __asm__ __volatile__( "btcl %1,%0" "btcl %1,%0" :"=m" (ADDR) :"+m" (ADDR) :"Ir" (nr)); :"Ir" (nr)); } } Loading @@ -123,7 +123,7 @@ static inline void change_bit(int nr, volatile unsigned long * addr) { { __asm__ __volatile__( LOCK_PREFIX __asm__ __volatile__( LOCK_PREFIX "btcl %1,%0" "btcl %1,%0" :"=m" (ADDR) :"+m" (ADDR) :"Ir" (nr)); :"Ir" (nr)); } } Loading @@ -142,7 +142,7 @@ static inline int test_and_set_bit(int nr, volatile unsigned long * addr) __asm__ __volatile__( LOCK_PREFIX __asm__ __volatile__( LOCK_PREFIX "btsl %2,%1\n\tsbbl %0,%0" "btsl %2,%1\n\tsbbl %0,%0" :"=r" (oldbit),"=m" (ADDR) :"=r" (oldbit),"+m" (ADDR) :"Ir" (nr) : "memory"); :"Ir" (nr) : "memory"); return oldbit; return oldbit; } } Loading @@ -162,7 +162,7 @@ static inline int __test_and_set_bit(int nr, volatile unsigned long * addr) __asm__( __asm__( "btsl %2,%1\n\tsbbl %0,%0" "btsl %2,%1\n\tsbbl %0,%0" :"=r" (oldbit),"=m" (ADDR) :"=r" (oldbit),"+m" (ADDR) :"Ir" (nr)); :"Ir" (nr)); return oldbit; return oldbit; } } Loading @@ -182,7 +182,7 @@ static inline int test_and_clear_bit(int nr, volatile unsigned long * addr) __asm__ __volatile__( LOCK_PREFIX __asm__ __volatile__( LOCK_PREFIX "btrl %2,%1\n\tsbbl %0,%0" "btrl %2,%1\n\tsbbl %0,%0" :"=r" (oldbit),"=m" (ADDR) :"=r" (oldbit),"+m" (ADDR) :"Ir" (nr) : "memory"); :"Ir" (nr) : "memory"); return oldbit; return oldbit; } } Loading @@ -202,7 +202,7 @@ static inline int __test_and_clear_bit(int nr, volatile unsigned long *addr) __asm__( __asm__( "btrl %2,%1\n\tsbbl %0,%0" "btrl %2,%1\n\tsbbl %0,%0" :"=r" (oldbit),"=m" (ADDR) :"=r" (oldbit),"+m" (ADDR) :"Ir" (nr)); :"Ir" (nr)); return oldbit; return oldbit; } } Loading @@ -214,7 +214,7 @@ static inline int __test_and_change_bit(int nr, volatile unsigned long *addr) __asm__ __volatile__( __asm__ __volatile__( "btcl %2,%1\n\tsbbl %0,%0" "btcl %2,%1\n\tsbbl %0,%0" :"=r" (oldbit),"=m" (ADDR) :"=r" (oldbit),"+m" (ADDR) :"Ir" (nr) : "memory"); :"Ir" (nr) : "memory"); return oldbit; return oldbit; } } Loading @@ -233,7 +233,7 @@ static inline int test_and_change_bit(int nr, volatile unsigned long* addr) __asm__ __volatile__( LOCK_PREFIX __asm__ __volatile__( LOCK_PREFIX "btcl %2,%1\n\tsbbl %0,%0" "btcl %2,%1\n\tsbbl %0,%0" :"=r" (oldbit),"=m" (ADDR) :"=r" (oldbit),"+m" (ADDR) :"Ir" (nr) : "memory"); :"Ir" (nr) : "memory"); return oldbit; return oldbit; } } Loading include/asm-x86_64/bitops.h +12 −12 Original line number Original line Diff line number Diff line Loading @@ -29,7 +29,7 @@ static __inline__ void set_bit(int nr, volatile void * addr) { { __asm__ __volatile__( LOCK_PREFIX __asm__ __volatile__( LOCK_PREFIX "btsl %1,%0" "btsl %1,%0" :"=m" (ADDR) :"+m" (ADDR) :"dIr" (nr) : "memory"); :"dIr" (nr) : "memory"); } } Loading @@ -46,7 +46,7 @@ static __inline__ void __set_bit(int nr, volatile void * addr) { { __asm__ volatile( __asm__ volatile( "btsl %1,%0" "btsl %1,%0" :"=m" (ADDR) :"+m" (ADDR) :"dIr" (nr) : "memory"); :"dIr" (nr) : "memory"); } } Loading @@ -64,7 +64,7 @@ static __inline__ void clear_bit(int nr, volatile void * addr) { { __asm__ __volatile__( LOCK_PREFIX __asm__ __volatile__( LOCK_PREFIX "btrl %1,%0" "btrl %1,%0" :"=m" (ADDR) :"+m" (ADDR) :"dIr" (nr)); :"dIr" (nr)); } } Loading @@ -72,7 +72,7 @@ static __inline__ void __clear_bit(int nr, volatile void * addr) { { __asm__ __volatile__( __asm__ __volatile__( "btrl %1,%0" "btrl %1,%0" :"=m" (ADDR) :"+m" (ADDR) :"dIr" (nr)); :"dIr" (nr)); } } Loading @@ -92,7 +92,7 @@ static __inline__ void __change_bit(int nr, volatile void * addr) { { __asm__ __volatile__( __asm__ __volatile__( "btcl %1,%0" "btcl %1,%0" :"=m" (ADDR) :"+m" (ADDR) :"dIr" (nr)); :"dIr" (nr)); } } Loading @@ -109,7 +109,7 @@ static __inline__ void change_bit(int nr, volatile void * addr) { { __asm__ __volatile__( LOCK_PREFIX __asm__ __volatile__( LOCK_PREFIX "btcl %1,%0" "btcl %1,%0" :"=m" (ADDR) :"+m" (ADDR) :"dIr" (nr)); :"dIr" (nr)); } } Loading @@ -127,7 +127,7 @@ static __inline__ int test_and_set_bit(int nr, volatile void * addr) __asm__ __volatile__( LOCK_PREFIX __asm__ __volatile__( LOCK_PREFIX "btsl %2,%1\n\tsbbl %0,%0" "btsl %2,%1\n\tsbbl %0,%0" :"=r" (oldbit),"=m" (ADDR) :"=r" (oldbit),"+m" (ADDR) :"dIr" (nr) : "memory"); :"dIr" (nr) : "memory"); return oldbit; return oldbit; } } Loading @@ -147,7 +147,7 @@ static __inline__ int __test_and_set_bit(int nr, volatile void * addr) __asm__( __asm__( "btsl %2,%1\n\tsbbl %0,%0" "btsl %2,%1\n\tsbbl %0,%0" :"=r" (oldbit),"=m" (ADDR) :"=r" (oldbit),"+m" (ADDR) :"dIr" (nr)); :"dIr" (nr)); return oldbit; return oldbit; } } Loading @@ -166,7 +166,7 @@ static __inline__ int test_and_clear_bit(int nr, volatile void * addr) __asm__ __volatile__( LOCK_PREFIX __asm__ __volatile__( LOCK_PREFIX "btrl %2,%1\n\tsbbl %0,%0" "btrl %2,%1\n\tsbbl %0,%0" :"=r" (oldbit),"=m" (ADDR) :"=r" (oldbit),"+m" (ADDR) :"dIr" (nr) : "memory"); :"dIr" (nr) : "memory"); return oldbit; return oldbit; } } Loading @@ -186,7 +186,7 @@ static __inline__ int __test_and_clear_bit(int nr, volatile void * addr) __asm__( __asm__( "btrl %2,%1\n\tsbbl %0,%0" "btrl %2,%1\n\tsbbl %0,%0" :"=r" (oldbit),"=m" (ADDR) :"=r" (oldbit),"+m" (ADDR) :"dIr" (nr)); :"dIr" (nr)); return oldbit; return oldbit; } } Loading @@ -198,7 +198,7 @@ static __inline__ int __test_and_change_bit(int nr, volatile void * addr) __asm__ __volatile__( __asm__ __volatile__( "btcl %2,%1\n\tsbbl %0,%0" "btcl %2,%1\n\tsbbl %0,%0" :"=r" (oldbit),"=m" (ADDR) :"=r" (oldbit),"+m" (ADDR) :"dIr" (nr) : "memory"); :"dIr" (nr) : "memory"); return oldbit; return oldbit; } } Loading @@ -217,7 +217,7 @@ static __inline__ int test_and_change_bit(int nr, volatile void * addr) __asm__ __volatile__( LOCK_PREFIX __asm__ __volatile__( LOCK_PREFIX "btcl %2,%1\n\tsbbl %0,%0" "btcl %2,%1\n\tsbbl %0,%0" :"=r" (oldbit),"=m" (ADDR) :"=r" (oldbit),"+m" (ADDR) :"dIr" (nr) : "memory"); :"dIr" (nr) : "memory"); return oldbit; return oldbit; } } Loading Loading
include/asm-i386/bitops.h +12 −12 Original line number Original line Diff line number Diff line Loading @@ -43,7 +43,7 @@ static inline void set_bit(int nr, volatile unsigned long * addr) { { __asm__ __volatile__( LOCK_PREFIX __asm__ __volatile__( LOCK_PREFIX "btsl %1,%0" "btsl %1,%0" :"=m" (ADDR) :"+m" (ADDR) :"Ir" (nr)); :"Ir" (nr)); } } Loading @@ -60,7 +60,7 @@ static inline void __set_bit(int nr, volatile unsigned long * addr) { { __asm__( __asm__( "btsl %1,%0" "btsl %1,%0" :"=m" (ADDR) :"+m" (ADDR) :"Ir" (nr)); :"Ir" (nr)); } } Loading @@ -78,7 +78,7 @@ static inline void clear_bit(int nr, volatile unsigned long * addr) { { __asm__ __volatile__( LOCK_PREFIX __asm__ __volatile__( LOCK_PREFIX "btrl %1,%0" "btrl %1,%0" :"=m" (ADDR) :"+m" (ADDR) :"Ir" (nr)); :"Ir" (nr)); } } Loading @@ -86,7 +86,7 @@ static inline void __clear_bit(int nr, volatile unsigned long * addr) { { __asm__ __volatile__( __asm__ __volatile__( "btrl %1,%0" "btrl %1,%0" :"=m" (ADDR) :"+m" (ADDR) :"Ir" (nr)); :"Ir" (nr)); } } #define smp_mb__before_clear_bit() barrier() #define smp_mb__before_clear_bit() barrier() Loading @@ -105,7 +105,7 @@ static inline void __change_bit(int nr, volatile unsigned long * addr) { { __asm__ __volatile__( __asm__ __volatile__( "btcl %1,%0" "btcl %1,%0" :"=m" (ADDR) :"+m" (ADDR) :"Ir" (nr)); :"Ir" (nr)); } } Loading @@ -123,7 +123,7 @@ static inline void change_bit(int nr, volatile unsigned long * addr) { { __asm__ __volatile__( LOCK_PREFIX __asm__ __volatile__( LOCK_PREFIX "btcl %1,%0" "btcl %1,%0" :"=m" (ADDR) :"+m" (ADDR) :"Ir" (nr)); :"Ir" (nr)); } } Loading @@ -142,7 +142,7 @@ static inline int test_and_set_bit(int nr, volatile unsigned long * addr) __asm__ __volatile__( LOCK_PREFIX __asm__ __volatile__( LOCK_PREFIX "btsl %2,%1\n\tsbbl %0,%0" "btsl %2,%1\n\tsbbl %0,%0" :"=r" (oldbit),"=m" (ADDR) :"=r" (oldbit),"+m" (ADDR) :"Ir" (nr) : "memory"); :"Ir" (nr) : "memory"); return oldbit; return oldbit; } } Loading @@ -162,7 +162,7 @@ static inline int __test_and_set_bit(int nr, volatile unsigned long * addr) __asm__( __asm__( "btsl %2,%1\n\tsbbl %0,%0" "btsl %2,%1\n\tsbbl %0,%0" :"=r" (oldbit),"=m" (ADDR) :"=r" (oldbit),"+m" (ADDR) :"Ir" (nr)); :"Ir" (nr)); return oldbit; return oldbit; } } Loading @@ -182,7 +182,7 @@ static inline int test_and_clear_bit(int nr, volatile unsigned long * addr) __asm__ __volatile__( LOCK_PREFIX __asm__ __volatile__( LOCK_PREFIX "btrl %2,%1\n\tsbbl %0,%0" "btrl %2,%1\n\tsbbl %0,%0" :"=r" (oldbit),"=m" (ADDR) :"=r" (oldbit),"+m" (ADDR) :"Ir" (nr) : "memory"); :"Ir" (nr) : "memory"); return oldbit; return oldbit; } } Loading @@ -202,7 +202,7 @@ static inline int __test_and_clear_bit(int nr, volatile unsigned long *addr) __asm__( __asm__( "btrl %2,%1\n\tsbbl %0,%0" "btrl %2,%1\n\tsbbl %0,%0" :"=r" (oldbit),"=m" (ADDR) :"=r" (oldbit),"+m" (ADDR) :"Ir" (nr)); :"Ir" (nr)); return oldbit; return oldbit; } } Loading @@ -214,7 +214,7 @@ static inline int __test_and_change_bit(int nr, volatile unsigned long *addr) __asm__ __volatile__( __asm__ __volatile__( "btcl %2,%1\n\tsbbl %0,%0" "btcl %2,%1\n\tsbbl %0,%0" :"=r" (oldbit),"=m" (ADDR) :"=r" (oldbit),"+m" (ADDR) :"Ir" (nr) : "memory"); :"Ir" (nr) : "memory"); return oldbit; return oldbit; } } Loading @@ -233,7 +233,7 @@ static inline int test_and_change_bit(int nr, volatile unsigned long* addr) __asm__ __volatile__( LOCK_PREFIX __asm__ __volatile__( LOCK_PREFIX "btcl %2,%1\n\tsbbl %0,%0" "btcl %2,%1\n\tsbbl %0,%0" :"=r" (oldbit),"=m" (ADDR) :"=r" (oldbit),"+m" (ADDR) :"Ir" (nr) : "memory"); :"Ir" (nr) : "memory"); return oldbit; return oldbit; } } Loading
include/asm-x86_64/bitops.h +12 −12 Original line number Original line Diff line number Diff line Loading @@ -29,7 +29,7 @@ static __inline__ void set_bit(int nr, volatile void * addr) { { __asm__ __volatile__( LOCK_PREFIX __asm__ __volatile__( LOCK_PREFIX "btsl %1,%0" "btsl %1,%0" :"=m" (ADDR) :"+m" (ADDR) :"dIr" (nr) : "memory"); :"dIr" (nr) : "memory"); } } Loading @@ -46,7 +46,7 @@ static __inline__ void __set_bit(int nr, volatile void * addr) { { __asm__ volatile( __asm__ volatile( "btsl %1,%0" "btsl %1,%0" :"=m" (ADDR) :"+m" (ADDR) :"dIr" (nr) : "memory"); :"dIr" (nr) : "memory"); } } Loading @@ -64,7 +64,7 @@ static __inline__ void clear_bit(int nr, volatile void * addr) { { __asm__ __volatile__( LOCK_PREFIX __asm__ __volatile__( LOCK_PREFIX "btrl %1,%0" "btrl %1,%0" :"=m" (ADDR) :"+m" (ADDR) :"dIr" (nr)); :"dIr" (nr)); } } Loading @@ -72,7 +72,7 @@ static __inline__ void __clear_bit(int nr, volatile void * addr) { { __asm__ __volatile__( __asm__ __volatile__( "btrl %1,%0" "btrl %1,%0" :"=m" (ADDR) :"+m" (ADDR) :"dIr" (nr)); :"dIr" (nr)); } } Loading @@ -92,7 +92,7 @@ static __inline__ void __change_bit(int nr, volatile void * addr) { { __asm__ __volatile__( __asm__ __volatile__( "btcl %1,%0" "btcl %1,%0" :"=m" (ADDR) :"+m" (ADDR) :"dIr" (nr)); :"dIr" (nr)); } } Loading @@ -109,7 +109,7 @@ static __inline__ void change_bit(int nr, volatile void * addr) { { __asm__ __volatile__( LOCK_PREFIX __asm__ __volatile__( LOCK_PREFIX "btcl %1,%0" "btcl %1,%0" :"=m" (ADDR) :"+m" (ADDR) :"dIr" (nr)); :"dIr" (nr)); } } Loading @@ -127,7 +127,7 @@ static __inline__ int test_and_set_bit(int nr, volatile void * addr) __asm__ __volatile__( LOCK_PREFIX __asm__ __volatile__( LOCK_PREFIX "btsl %2,%1\n\tsbbl %0,%0" "btsl %2,%1\n\tsbbl %0,%0" :"=r" (oldbit),"=m" (ADDR) :"=r" (oldbit),"+m" (ADDR) :"dIr" (nr) : "memory"); :"dIr" (nr) : "memory"); return oldbit; return oldbit; } } Loading @@ -147,7 +147,7 @@ static __inline__ int __test_and_set_bit(int nr, volatile void * addr) __asm__( __asm__( "btsl %2,%1\n\tsbbl %0,%0" "btsl %2,%1\n\tsbbl %0,%0" :"=r" (oldbit),"=m" (ADDR) :"=r" (oldbit),"+m" (ADDR) :"dIr" (nr)); :"dIr" (nr)); return oldbit; return oldbit; } } Loading @@ -166,7 +166,7 @@ static __inline__ int test_and_clear_bit(int nr, volatile void * addr) __asm__ __volatile__( LOCK_PREFIX __asm__ __volatile__( LOCK_PREFIX "btrl %2,%1\n\tsbbl %0,%0" "btrl %2,%1\n\tsbbl %0,%0" :"=r" (oldbit),"=m" (ADDR) :"=r" (oldbit),"+m" (ADDR) :"dIr" (nr) : "memory"); :"dIr" (nr) : "memory"); return oldbit; return oldbit; } } Loading @@ -186,7 +186,7 @@ static __inline__ int __test_and_clear_bit(int nr, volatile void * addr) __asm__( __asm__( "btrl %2,%1\n\tsbbl %0,%0" "btrl %2,%1\n\tsbbl %0,%0" :"=r" (oldbit),"=m" (ADDR) :"=r" (oldbit),"+m" (ADDR) :"dIr" (nr)); :"dIr" (nr)); return oldbit; return oldbit; } } Loading @@ -198,7 +198,7 @@ static __inline__ int __test_and_change_bit(int nr, volatile void * addr) __asm__ __volatile__( __asm__ __volatile__( "btcl %2,%1\n\tsbbl %0,%0" "btcl %2,%1\n\tsbbl %0,%0" :"=r" (oldbit),"=m" (ADDR) :"=r" (oldbit),"+m" (ADDR) :"dIr" (nr) : "memory"); :"dIr" (nr) : "memory"); return oldbit; return oldbit; } } Loading @@ -217,7 +217,7 @@ static __inline__ int test_and_change_bit(int nr, volatile void * addr) __asm__ __volatile__( LOCK_PREFIX __asm__ __volatile__( LOCK_PREFIX "btcl %2,%1\n\tsbbl %0,%0" "btcl %2,%1\n\tsbbl %0,%0" :"=r" (oldbit),"=m" (ADDR) :"=r" (oldbit),"+m" (ADDR) :"dIr" (nr) : "memory"); :"dIr" (nr) : "memory"); return oldbit; return oldbit; } } Loading