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Commit 91a290c4 authored by Ameya Palande's avatar Ameya Palande Committed by Paul Walmsley
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ARM: OMAP4: clock data: fix mult and div mask for USB_DPLL 



According to OMAP4 TRM Table 3-1183, CM_CLKSEL_DPLL_USB register defines
following fields for multiplication and division factors:

DPLL_MULT (bits 19:8) DPLL multiplier factor (2 to 4095)
DPLL_DIV (bits 7:0) DPLL divider factor (0 to 255)

Acked-by: default avatarBenoit Cousson <b-cousson@ti.com>
Signed-off-by: default avatarAmeya Palande <ameya.palande@ti.com>
Signed-off-by: default avatarPaul Walmsley <paul@pwsan.com>
parent 59269b94

arch/arm/mach-omap2/clock44xx_data.c

+2 −2
Original line number Diff line number Diff line
@@ -957,8 +957,8 @@ static struct dpll_data dpll_usb_dd = { 
	.modes		= (1 << DPLL_LOW_POWER_BYPASS) | (1 << DPLL_LOCKED),

	.autoidle_reg	= OMAP4430_CM_AUTOIDLE_DPLL_USB,

	.idlest_reg	= OMAP4430_CM_IDLEST_DPLL_USB,

	.mult_mask	= OMAP4430_DPLL_MULT_MASK,

	.div1_mask	= OMAP4430_DPLL_DIV_MASK,

	.mult_mask	= OMAP4430_DPLL_MULT_USB_MASK,

	.div1_mask	= OMAP4430_DPLL_DIV_0_7_MASK,

	.enable_mask	= OMAP4430_DPLL_EN_MASK,

	.autoidle_mask	= OMAP4430_AUTO_DPLL_MODE_MASK,

	.idlest_mask	= OMAP4430_ST_DPLL_CLK_MASK,