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Commit 9161c3b7 authored by Linus Torvalds's avatar Linus Torvalds
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Merge tag 'clk-for-linus' of git://git.linaro.org/people/mturquette/linux

Pull common clk framework changes from Michael Turquette:
 "This includes a small number of core framework improvments, platform
  ports and new DT bindings."

Fix up trivial conflicts in drivers/clk/Makefile

* tag 'clk-for-linus' of git://git.linaro.org/people/mturquette/linux: (21 commits)
  clk: fix compile for OF && !COMMON_CLK
  clk: fix clk_get on of_clk_get_by_name return check
  clk: mxs: clk_register_clkdev mx28 usb clocks
  clk: add highbank clock support
  dt: add clock binding doc to primecell bindings
  clk: add DT fixed-clock binding support
  clk: add DT clock binding support
  ARM: integrator: convert to common clock
  clk: add versatile ICST307 driver
  ARM: integrator: put symbolic bus names on devices
  ARM: u300: convert to common clock
  clk: cache parent clocks only for muxes
  clk: wm831x: Add initial WM831x clock driver
  clk: Constify struct clk_init_data
  clk: Add CLK_IS_BASIC flag to identify basic clocks
  clk: Add support for rate table based dividers
  clk: Add support for power of two type dividers
  clk: mxs: imx28: decrease the frequency of ref_io1 for SSP2 and SSP3
  clk: mxs: add clkdev lookup for pwm
  clk: mxs: Fix the GPMI clock name
  ...
parents 97027da6 137f8a72
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@@ -13,11 +13,17 @@ Required properties:
Optional properties:

- arm,primecell-periphid : Value to override the h/w value with
- clocks : From common clock binding. First clock is phandle to clock for apb
	pclk. Additional clocks are optional and specific to those peripherals.
- clock-names : From common clock binding. Shall be "apb_pclk" for first clock.

Example:

serial@fff36000 {
	compatible = "arm,pl011", "arm,primecell";
	arm,primecell-periphid = <0x00341011>;
	clocks = <&pclk>;
	clock-names = "apb_pclk";
	
};
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Device Tree Clock bindings for Calxeda highbank platform

This binding uses the common clock binding[1].

[1] Documentation/devicetree/bindings/clock/clock-bindings.txt

Required properties:
- compatible : shall be one of the following:
	"calxeda,hb-pll-clock" - for a PLL clock
	"calxeda,hb-a9periph-clock" - The A9 peripheral clock divided from the
		A9 clock.
	"calxeda,hb-a9bus-clock" - The A9 bus clock divided from the A9 clock.
	"calxeda,hb-emmc-clock" - Divided clock for MMC/SD controller.
- reg : shall be the control register offset from SYSREGs base for the clock.
- clocks : shall be the input parent clock phandle for the clock. This is
	either an oscillator or a pll output.
- #clock-cells : from common clock binding; shall be set to 0.
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This binding is a work-in-progress, and are based on some experimental
work by benh[1].

Sources of clock signal can be represented by any node in the device
tree.  Those nodes are designated as clock providers.  Clock consumer
nodes use a phandle and clock specifier pair to connect clock provider
outputs to clock inputs.  Similar to the gpio specifiers, a clock
specifier is an array of one more more cells identifying the clock
output on a device.  The length of a clock specifier is defined by the
value of a #clock-cells property in the clock provider node.

[1] http://patchwork.ozlabs.org/patch/31551/

==Clock providers==

Required properties:
#clock-cells:	   Number of cells in a clock specifier; Typically 0 for nodes
		   with a single clock output and 1 for nodes with multiple
		   clock outputs.

Optional properties:
clock-output-names: Recommended to be a list of strings of clock output signal
		    names indexed by the first cell in the clock specifier.
		    However, the meaning of clock-output-names is domain
		    specific to the clock provider, and is only provided to
		    encourage using the same meaning for the majority of clock
		    providers.  This format may not work for clock providers
		    using a complex clock specifier format.  In those cases it
		    is recommended to omit this property and create a binding
		    specific names property.

		    Clock consumer nodes must never directly reference
		    the provider's clock-output-names property.

For example:

    oscillator {
        #clock-cells = <1>;
        clock-output-names = "ckil", "ckih";
    };

- this node defines a device with two clock outputs, the first named
  "ckil" and the second named "ckih".  Consumer nodes always reference
  clocks by index. The names should reflect the clock output signal
  names for the device.

==Clock consumers==

Required properties:
clocks:		List of phandle and clock specifier pairs, one pair
		for each clock input to the device.  Note: if the
		clock provider specifies '0' for #clock-cells, then
		only the phandle portion of the pair will appear.

Optional properties:
clock-names:	List of clock input name strings sorted in the same
		order as the clocks property.  Consumers drivers
		will use clock-names to match clock input names
		with clocks specifiers.
clock-ranges:	Empty property indicating that child nodes can inherit named
		clocks from this node. Useful for bus nodes to provide a
		clock to their children.

For example:

    device {
        clocks = <&osc 1>, <&ref 0>;
        clock-names = "baud", "register";
    };


This represents a device with two clock inputs, named "baud" and "register".
The baud clock is connected to output 1 of the &osc device, and the register
clock is connected to output 0 of the &ref.

==Example==

    /* external oscillator */
    osc: oscillator {
        compatible = "fixed-clock";
        #clock-cells = <1>;
        clock-frequency  = <32678>;
        clock-output-names = "osc";
    };

    /* phase-locked-loop device, generates a higher frequency clock
     * from the external oscillator reference */
    pll: pll@4c000 {
        compatible = "vendor,some-pll-interface"
        #clock-cells = <1>;
        clocks = <&osc 0>;
        clock-names = "ref";
        reg = <0x4c000 0x1000>;
        clock-output-names = "pll", "pll-switched";
    };

    /* UART, using the low frequency oscillator for the baud clock,
     * and the high frequency switched PLL output for register
     * clocking */
    uart@a000 {
        compatible = "fsl,imx-uart";
        reg = <0xa000 0x1000>;
        interrupts = <33>;
        clocks = <&osc 0>, <&pll 1>;
        clock-names = "baud", "register";
    };

This DT fragment defines three devices: an external oscillator to provide a
low-frequency reference clock, a PLL device to generate a higher frequency
clock signal, and a UART.

* The oscillator is fixed-frequency, and provides one clock output, named "osc".
* The PLL is both a clock provider and a clock consumer. It uses the clock
  signal generated by the external oscillator, and provides two output signals
  ("pll" and "pll-switched").
* The UART has its baud clock connected the external oscillator and its
  register clock connected to the PLL clock (the "pll-switched" signal)
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Binding for simple fixed-rate clock sources.

This binding uses the common clock binding[1].

[1] Documentation/devicetree/bindings/clock/clock-bindings.txt

Required properties:
- compatible : shall be "fixed-clock".
- #clock-cells : from common clock binding; shall be set to 0.
- clock-frequency : frequency of clock in Hz. Should be a single cell.

Optional properties:
- gpios : From common gpio binding; gpio connection to clock enable pin.
- clock-output-names : From common clock binding.

Example:
	clock {
		compatible = "fixed-clock";
		#clock-cells = <0>;
		clock-frequency = <1000000000>;
	};
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@@ -7605,6 +7605,7 @@ W: http://opensource.wolfsonmicro.com/content/linux-drivers-wolfson-devices
S:	Supported
F:	Documentation/hwmon/wm83??
F:	arch/arm/mach-s3c64xx/mach-crag6410*
F:	drivers/clk/clk-wm83*.c
F:	drivers/leds/leds-wm83*.c
F:	drivers/hwmon/wm83??-hwmon.c
F:	drivers/input/misc/wm831x-on.c
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