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Commit 90357fcb authored by Kuninori Morimoto's avatar Kuninori Morimoto Committed by Simon Horman
Browse files

ARM: shmobile: bockw: add SMSC support on reference 



This patch enables INTC IRQ, and SMSC IRQ.

Signed-off-by: default avatarKuninori Morimoto <kuninori.morimoto.gx@renesas.com>
Signed-off-by: default avatarSimon Horman <horms+renesas@verge.net.au>
parent b6d5a1b1

arch/arm/mach-shmobile/board-bockw-reference.c

+20 −0
Original line number Original line Diff line number Diff line
@@ -36,15 +36,35 @@ static const struct pinctrl_map bockw_pinctrl_map[] = { 
				  "scif0_ctrl", "scif0"),

				  "scif0_ctrl", "scif0"),

};

};





#define FPGA	0x18200000

#define IRQ0MR	0x30

#define COMCTLR	0x101c

static void __init bockw_init(void)

static void __init bockw_init(void)

{

{

	static void __iomem *fpga;



	r8a7778_clock_init();

	r8a7778_clock_init();

	r8a7778_init_irq_extpin_dt(1);





	pinctrl_register_mappings(bockw_pinctrl_map,

	pinctrl_register_mappings(bockw_pinctrl_map,

				  ARRAY_SIZE(bockw_pinctrl_map));

				  ARRAY_SIZE(bockw_pinctrl_map));

	r8a7778_pinmux_init();

	r8a7778_pinmux_init();

	r8a7778_add_dt_devices();

	r8a7778_add_dt_devices();





	fpga = ioremap_nocache(FPGA, SZ_1M);

	if (fpga) {

		/*

		 * CAUTION

		 *

		 * IRQ0/1 is cascaded interrupt from FPGA.

		 * it should be cared in the future

		 * Now, it is assuming IRQ0 was used only from SMSC.

		 */

		u16 val = ioread16(fpga + IRQ0MR);

		val &= ~(1 << 4); /* enable SMSC911x */

		iowrite16(val, fpga + IRQ0MR);

	}



	of_platform_populate(NULL, of_default_bus_match_table, NULL, NULL);

	of_platform_populate(NULL, of_default_bus_match_table, NULL, NULL);

}

}