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Commit 9013bb40 authored by Huang Shijie's avatar Huang Shijie Committed by David Woodhouse
Browse files

mtd: gpmi: add gpmi support for mx6q 



add gpmi support for mx6q.

Signed-off-by: default avatarHuang Shijie <b32955@freescale.com>
Signed-off-by: default avatarHuang Shijie <shijie8@gmail.com>
Signed-off-by: default avatarArtem Bityutskiy <artem.bityutskiy@linux.intel.com>
Signed-off-by: default avatarDavid Woodhouse <David.Woodhouse@intel.com>
parent e10db1f0

drivers/mtd/nand/Kconfig

+1 −1
Original line number Diff line number Diff line
@@ -440,7 +440,7 @@ config MTD_NAND_NANDSIM 


config MTD_NAND_GPMI_NAND

        bool "GPMI NAND Flash Controller driver"

        depends on MTD_NAND && (SOC_IMX23 || SOC_IMX28)

        depends on MTD_NAND && (SOC_IMX23 || SOC_IMX28 || SOC_IMX6Q)

        help

	 Enables NAND Flash support for IMX23 or IMX28.

	 The GPMI controller is very powerful, with the help of BCH

drivers/mtd/nand/gpmi-nand/bch-regs.h

+32 −10
Original line number Diff line number Diff line
@@ -51,15 +51,26 @@ 


#define BP_BCH_FLASH0LAYOUT0_ECC0		12

#define BM_BCH_FLASH0LAYOUT0_ECC0	(0xf << BP_BCH_FLASH0LAYOUT0_ECC0)

#define BF_BCH_FLASH0LAYOUT0_ECC0(v)		\

	(((v) << BP_BCH_FLASH0LAYOUT0_ECC0) & BM_BCH_FLASH0LAYOUT0_ECC0)

#define MX6Q_BP_BCH_FLASH0LAYOUT0_ECC0		11

#define MX6Q_BM_BCH_FLASH0LAYOUT0_ECC0	(0x1f << MX6Q_BP_BCH_FLASH0LAYOUT0_ECC0)

#define BF_BCH_FLASH0LAYOUT0_ECC0(v, x)				\

	(GPMI_IS_MX6Q(x)					\

		? (((v) << MX6Q_BP_BCH_FLASH0LAYOUT0_ECC0)	\

			& MX6Q_BM_BCH_FLASH0LAYOUT0_ECC0)	\

		: (((v) << BP_BCH_FLASH0LAYOUT0_ECC0)		\

			& BM_BCH_FLASH0LAYOUT0_ECC0)		\

	)



#define BP_BCH_FLASH0LAYOUT0_DATA0_SIZE		0

#define BM_BCH_FLASH0LAYOUT0_DATA0_SIZE		\

			(0xfff << BP_BCH_FLASH0LAYOUT0_DATA0_SIZE)

#define BF_BCH_FLASH0LAYOUT0_DATA0_SIZE(v)	\

	(((v) << BP_BCH_FLASH0LAYOUT0_DATA0_SIZE)\

					 & BM_BCH_FLASH0LAYOUT0_DATA0_SIZE)

#define MX6Q_BM_BCH_FLASH0LAYOUT0_DATA0_SIZE	\

			(0x3ff << BP_BCH_FLASH0LAYOUT0_DATA0_SIZE)

#define BF_BCH_FLASH0LAYOUT0_DATA0_SIZE(v, x)				\

	(GPMI_IS_MX6Q(x)						\

		? (((v) >> 2) & MX6Q_BM_BCH_FLASH0LAYOUT0_DATA0_SIZE)	\

		: ((v) & BM_BCH_FLASH0LAYOUT0_DATA0_SIZE)		\

	)



#define HW_BCH_FLASH0LAYOUT1			0x00000090
@@ -72,13 +83,24 @@ 


#define BP_BCH_FLASH0LAYOUT1_ECCN		12

#define BM_BCH_FLASH0LAYOUT1_ECCN	(0xf << BP_BCH_FLASH0LAYOUT1_ECCN)

#define BF_BCH_FLASH0LAYOUT1_ECCN(v)		\

	(((v) << BP_BCH_FLASH0LAYOUT1_ECCN) & BM_BCH_FLASH0LAYOUT1_ECCN)

#define MX6Q_BP_BCH_FLASH0LAYOUT1_ECCN		11

#define MX6Q_BM_BCH_FLASH0LAYOUT1_ECCN	(0x1f << MX6Q_BP_BCH_FLASH0LAYOUT1_ECCN)

#define BF_BCH_FLASH0LAYOUT1_ECCN(v, x)				\

	(GPMI_IS_MX6Q(x)					\

		? (((v) << MX6Q_BP_BCH_FLASH0LAYOUT1_ECCN)	\

			& MX6Q_BM_BCH_FLASH0LAYOUT1_ECCN)	\

		: (((v) << BP_BCH_FLASH0LAYOUT1_ECCN)		\

			& BM_BCH_FLASH0LAYOUT1_ECCN)		\

	)



#define BP_BCH_FLASH0LAYOUT1_DATAN_SIZE		0

#define BM_BCH_FLASH0LAYOUT1_DATAN_SIZE		\

			(0xfff << BP_BCH_FLASH0LAYOUT1_DATAN_SIZE)

#define BF_BCH_FLASH0LAYOUT1_DATAN_SIZE(v)	\

	(((v) << BP_BCH_FLASH0LAYOUT1_DATAN_SIZE) \

					 & BM_BCH_FLASH0LAYOUT1_DATAN_SIZE)

#define MX6Q_BM_BCH_FLASH0LAYOUT1_DATAN_SIZE	\

			(0x3ff << BP_BCH_FLASH0LAYOUT1_DATAN_SIZE)

#define BF_BCH_FLASH0LAYOUT1_DATAN_SIZE(v, x)				\

	(GPMI_IS_MX6Q(x)						\

		? (((v) >> 2) & MX6Q_BM_BCH_FLASH0LAYOUT1_DATAN_SIZE)	\

		: ((v) & BM_BCH_FLASH0LAYOUT1_DATAN_SIZE)		\

	)

#endif

drivers/mtd/nand/gpmi-nand/gpmi-lib.c

+6 −5
Original line number Diff line number Diff line
@@ -224,13 +224,13 @@ int bch_set_geometry(struct gpmi_nand_data *this) 
	/* Configure layout 0. */

	writel(BF_BCH_FLASH0LAYOUT0_NBLOCKS(block_count)

			| BF_BCH_FLASH0LAYOUT0_META_SIZE(metadata_size)

			| BF_BCH_FLASH0LAYOUT0_ECC0(ecc_strength)

			| BF_BCH_FLASH0LAYOUT0_DATA0_SIZE(block_size),

			| BF_BCH_FLASH0LAYOUT0_ECC0(ecc_strength, this)

			| BF_BCH_FLASH0LAYOUT0_DATA0_SIZE(block_size, this),

			r->bch_regs + HW_BCH_FLASH0LAYOUT0);



	writel(BF_BCH_FLASH0LAYOUT1_PAGE_SIZE(page_size)

			| BF_BCH_FLASH0LAYOUT1_ECCN(ecc_strength)

			| BF_BCH_FLASH0LAYOUT1_DATAN_SIZE(block_size),

			| BF_BCH_FLASH0LAYOUT1_ECCN(ecc_strength, this)

			| BF_BCH_FLASH0LAYOUT1_DATAN_SIZE(block_size, this),

			r->bch_regs + HW_BCH_FLASH0LAYOUT1);



	/* Set *all* chip selects to use layout 0. */
@@ -805,7 +805,8 @@ int gpmi_is_ready(struct gpmi_nand_data *this, unsigned chip) 
	if (GPMI_IS_MX23(this)) {

		mask = MX23_BM_GPMI_DEBUG_READY0 << chip;

		reg = readl(r->gpmi_regs + HW_GPMI_DEBUG);

	} else if (GPMI_IS_MX28(this)) {

	} else if (GPMI_IS_MX28(this) || GPMI_IS_MX6Q(this)) {

		/* MX28 shares the same R/B register as MX6Q. */

		mask = MX28_BF_GPMI_STAT_READY_BUSY(1 << chip);

		reg = readl(r->gpmi_regs + HW_GPMI_STAT);

	} else

drivers/mtd/nand/gpmi-nand/gpmi-nand.c

+4 −0
Original line number Diff line number Diff line
@@ -1515,6 +1515,7 @@ static int __devinit gpmi_nfc_init(struct gpmi_nand_data *this) 
static const struct platform_device_id gpmi_ids[] = {

	{ .name = "imx23-gpmi-nand", .driver_data = IS_MX23, },

	{ .name = "imx28-gpmi-nand", .driver_data = IS_MX28, },

	{ .name = "imx6q-gpmi-nand", .driver_data = IS_MX6Q, },

	{},

};
@@ -1525,6 +1526,9 @@ static const struct of_device_id gpmi_nand_id_table[] = { 
	}, {

		.compatible = "fsl,imx28-gpmi-nand",

		.data = (void *)&gpmi_ids[IS_MX28]

	}, {

		.compatible = "fsl,imx6q-gpmi-nand",

		.data = (void *)&gpmi_ids[IS_MX6Q]

	}, {}

};

MODULE_DEVICE_TABLE(of, gpmi_nand_id_table);

drivers/mtd/nand/gpmi-nand/gpmi-nand.h

+2 −0
Original line number Diff line number Diff line
@@ -268,6 +268,8 @@ extern int gpmi_read_page(struct gpmi_nand_data *, 
/* Use the platform_id to distinguish different Archs. */

#define IS_MX23			0x0

#define IS_MX28			0x1

#define IS_MX6Q			0x2

#define GPMI_IS_MX23(x)		((x)->pdev->id_entry->driver_data == IS_MX23)

#define GPMI_IS_MX28(x)		((x)->pdev->id_entry->driver_data == IS_MX28)

#define GPMI_IS_MX6Q(x)		((x)->pdev->id_entry->driver_data == IS_MX6Q)

#endif