Donate to e Foundation | Murena handsets with /e/OS | Own a part of Murena! Learn more

Commit 8eb80252 authored by Tiffany Lin's avatar Tiffany Lin Committed by Mauro Carvalho Chehab
Browse files

[media] arm64: dts: mediatek: Add Video Encoder for MT8173 



Add video encoder node for MT8173

Signed-off-by: default avatarTiffany Lin <tiffany.lin@mediatek.com>
Signed-off-by: default avatarHans Verkuil <hans.verkuil@cisco.com>
Signed-off-by: default avatarMauro Carvalho Chehab <mchehab@s-opensource.com>
parent 2cc93862

arch/arm64/boot/dts/mediatek/mt8173.dtsi

+39 −0
Original line number Diff line number Diff line
@@ -777,6 +777,45 @@ 
			clock-names = "apb", "smi";

		};



		vcodec_enc: vcodec@18002000 {

			compatible = "mediatek,mt8173-vcodec-enc";

			reg = <0 0x18002000 0 0x1000>,	/* VENC_SYS */

			      <0 0x19002000 0 0x1000>;	/* VENC_LT_SYS */

			interrupts = <GIC_SPI 198 IRQ_TYPE_LEVEL_LOW>,

				     <GIC_SPI 202 IRQ_TYPE_LEVEL_LOW>;

			mediatek,larb = <&larb3>,

					<&larb5>;

			iommus = <&iommu M4U_PORT_VENC_RCPU>,

				 <&iommu M4U_PORT_VENC_REC>,

				 <&iommu M4U_PORT_VENC_BSDMA>,

				 <&iommu M4U_PORT_VENC_SV_COMV>,

				 <&iommu M4U_PORT_VENC_RD_COMV>,

				 <&iommu M4U_PORT_VENC_CUR_LUMA>,

				 <&iommu M4U_PORT_VENC_CUR_CHROMA>,

				 <&iommu M4U_PORT_VENC_REF_LUMA>,

				 <&iommu M4U_PORT_VENC_REF_CHROMA>,

				 <&iommu M4U_PORT_VENC_NBM_RDMA>,

				 <&iommu M4U_PORT_VENC_NBM_WDMA>,

				 <&iommu M4U_PORT_VENC_RCPU_SET2>,

				 <&iommu M4U_PORT_VENC_REC_FRM_SET2>,

				 <&iommu M4U_PORT_VENC_BSDMA_SET2>,

				 <&iommu M4U_PORT_VENC_SV_COMA_SET2>,

				 <&iommu M4U_PORT_VENC_RD_COMA_SET2>,

				 <&iommu M4U_PORT_VENC_CUR_LUMA_SET2>,

				 <&iommu M4U_PORT_VENC_CUR_CHROMA_SET2>,

				 <&iommu M4U_PORT_VENC_REF_LUMA_SET2>,

				 <&iommu M4U_PORT_VENC_REC_CHROMA_SET2>;

			mediatek,vpu = <&vpu>;

			clocks = <&topckgen CLK_TOP_VENCPLL_D2>,

				 <&topckgen CLK_TOP_VENC_SEL>,

				 <&topckgen CLK_TOP_UNIVPLL1_D2>,

				 <&topckgen CLK_TOP_VENC_LT_SEL>;

			clock-names = "venc_sel_src",

				      "venc_sel",

				      "venc_lt_sel_src",

				      "venc_lt_sel";

		};



		vencltsys: clock-controller@19000000 {

			compatible = "mediatek,mt8173-vencltsys", "syscon";

			reg = <0 0x19000000 0 0x1000>;