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Commit 8e5bdc44 authored by Russell King's avatar Russell King Committed by Russell King
Browse files

Merge branch 'omap2-upstream' of... 

Merge branch 'omap2-upstream' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap-2.6 into omap-all
parents 5a07055a 2e7509e5

arch/arm/mach-omap1/devices.c

+1 −1
Original line number Diff line number Diff line
@@ -101,7 +101,7 @@ static inline void omap_init_mbox(void) { } 


#if defined(CONFIG_OMAP_STI)



#define OMAP1_STI_BASE		IO_ADDRESS(0xfffea000)

#define OMAP1_STI_BASE		0xfffea000

#define OMAP1_STI_CHANNEL_BASE	(OMAP1_STI_BASE + 0x400)



static struct resource sti_resources[] = {

arch/arm/mach-omap2/Makefile

+4 −1
Original line number Diff line number Diff line
@@ -14,7 +14,10 @@ obj-$(CONFIG_ARCH_OMAP2420) += sram242x.o 
obj-$(CONFIG_ARCH_OMAP2430)		+= sram243x.o



# Power Management

obj-$(CONFIG_PM) += pm.o sleep.o

ifeq ($(CONFIG_PM),y)

obj-y					+= pm.o

obj-$(CONFIG_ARCH_OMAP24XX)		+= sleep24xx.o

endif



# Clock framework

obj-$(CONFIG_ARCH_OMAP2)		+= clock24xx.o

arch/arm/mach-omap2/clock.h

+1 −0
Original line number Diff line number Diff line
@@ -21,6 +21,7 @@ 
/* The maximum error between a target DPLL rate and the rounded rate in Hz */

#define DEFAULT_DPLL_RATE_TOLERANCE	50000



int omap2_clk_init(void);

int omap2_clk_enable(struct clk *clk);

void omap2_clk_disable(struct clk *clk);

long omap2_clk_round_rate(struct clk *clk, unsigned long rate);

arch/arm/mach-omap2/devices.c

+176 −49
Original line number Diff line number Diff line
@@ -23,50 +23,7 @@ 
#include <mach/board.h>

#include <mach/mux.h>

#include <mach/gpio.h>



#if	defined(CONFIG_I2C_OMAP) || defined(CONFIG_I2C_OMAP_MODULE)



#define OMAP2_I2C_BASE2		0x48072000

#define OMAP2_I2C_INT2		57



static struct resource i2c_resources2[] = {

	{

		.start		= OMAP2_I2C_BASE2,

		.end		= OMAP2_I2C_BASE2 + 0x3f,

		.flags		= IORESOURCE_MEM,

	},

	{

		.start		= OMAP2_I2C_INT2,

		.flags		= IORESOURCE_IRQ,

	},

};



static struct platform_device omap_i2c_device2 = {

	.name           = "i2c_omap",

	.id             = 2,

	.num_resources	= ARRAY_SIZE(i2c_resources2),

	.resource	= i2c_resources2,

};



/* See also arch/arm/plat-omap/devices.c for first I2C on 24xx */

static void omap_init_i2c(void)

{

	/* REVISIT: Second I2C not in use on H4? */

	if (machine_is_omap_h4())

		return;



	if (!cpu_is_omap2430()) {

		omap_cfg_reg(J15_24XX_I2C2_SCL);

		omap_cfg_reg(H19_24XX_I2C2_SDA);

	}

	(void) platform_device_register(&omap_i2c_device2);

}



#else



static void omap_init_i2c(void) {}



#endif

#include <mach/eac.h>



#if defined(CONFIG_OMAP_DSP) || defined(CONFIG_OMAP_DSP_MODULE)

#define OMAP2_MBOX_BASE		IO_ADDRESS(OMAP24XX_MAILBOX_BASE)
@@ -104,7 +61,9 @@ static inline void omap_init_mbox(void) { } 


#if defined(CONFIG_OMAP_STI)



#define OMAP2_STI_BASE		IO_ADDRESS(0x48068000)

#if defined(CONFIG_ARCH_OMAP2)



#define OMAP2_STI_BASE		0x48068000

#define OMAP2_STI_CHANNEL_BASE	0x54000000

#define OMAP2_STI_IRQ		4
@@ -124,6 +83,25 @@ static struct resource sti_resources[] = { 
		.flags		= IORESOURCE_IRQ,

	}

};

#elif defined(CONFIG_ARCH_OMAP3)



#define OMAP3_SDTI_BASE		0x54500000

#define OMAP3_SDTI_CHANNEL_BASE	0x54600000



static struct resource sti_resources[] = {

	{

		.start		= OMAP3_SDTI_BASE,

		.end		= OMAP3_SDTI_BASE + 0xFFF,

		.flags		= IORESOURCE_MEM,

	},

	{

		.start		= OMAP3_SDTI_CHANNEL_BASE,

		.end		= OMAP3_SDTI_CHANNEL_BASE + SZ_1M - 1,

		.flags		= IORESOURCE_MEM,

	}

};



#endif



static struct platform_device sti_device = {

	.name		= "sti",
@@ -140,12 +118,14 @@ static inline void omap_init_sti(void) 
static inline void omap_init_sti(void) {}

#endif



#if defined(CONFIG_SPI_OMAP24XX)

#if defined(CONFIG_SPI_OMAP24XX) || defined(CONFIG_SPI_OMAP24XX_MODULE)



#include <mach/mcspi.h>



#define OMAP2_MCSPI1_BASE		0x48098000

#define OMAP2_MCSPI2_BASE		0x4809a000

#define OMAP2_MCSPI3_BASE		0x480b8000

#define OMAP2_MCSPI4_BASE		0x480ba000



static struct omap2_mcspi_platform_config omap2_mcspi1_config = {

	.num_cs		= 4,
@@ -159,7 +139,7 @@ static struct resource omap2_mcspi1_resources[] = { 
	},

};



struct platform_device omap2_mcspi1 = {

static struct platform_device omap2_mcspi1 = {

	.name		= "omap2_mcspi",

	.id		= 1,

	.num_resources	= ARRAY_SIZE(omap2_mcspi1_resources),
@@ -181,7 +161,7 @@ static struct resource omap2_mcspi2_resources[] = { 
	},

};



struct platform_device omap2_mcspi2 = {

static struct platform_device omap2_mcspi2 = {

	.name		= "omap2_mcspi",

	.id		= 2,

	.num_resources	= ARRAY_SIZE(omap2_mcspi2_resources),
@@ -191,16 +171,162 @@ struct platform_device omap2_mcspi2 = { 
	},

};



#if defined(CONFIG_ARCH_OMAP2430) || defined(CONFIG_ARCH_OMAP3)

static struct omap2_mcspi_platform_config omap2_mcspi3_config = {

	.num_cs		= 2,

};



static struct resource omap2_mcspi3_resources[] = {

	{

	.start		= OMAP2_MCSPI3_BASE,

	.end		= OMAP2_MCSPI3_BASE + 0xff,

	.flags		= IORESOURCE_MEM,

	},

};



static struct platform_device omap2_mcspi3 = {

	.name		= "omap2_mcspi",

	.id		= 3,

	.num_resources	= ARRAY_SIZE(omap2_mcspi3_resources),

	.resource	= omap2_mcspi3_resources,

	.dev		= {

		.platform_data = &omap2_mcspi3_config,

	},

};

#endif



#ifdef CONFIG_ARCH_OMAP3

static struct omap2_mcspi_platform_config omap2_mcspi4_config = {

	.num_cs		= 1,

};



static struct resource omap2_mcspi4_resources[] = {

	{

		.start		= OMAP2_MCSPI4_BASE,

		.end		= OMAP2_MCSPI4_BASE + 0xff,

		.flags		= IORESOURCE_MEM,

	},

};



static struct platform_device omap2_mcspi4 = {

	.name		= "omap2_mcspi",

	.id		= 4,

	.num_resources	= ARRAY_SIZE(omap2_mcspi4_resources),

	.resource	= omap2_mcspi4_resources,

	.dev		= {

		.platform_data = &omap2_mcspi4_config,

	},

};

#endif



static void omap_init_mcspi(void)

{

	platform_device_register(&omap2_mcspi1);

	platform_device_register(&omap2_mcspi2);

#if defined(CONFIG_ARCH_OMAP2430) || defined(CONFIG_ARCH_OMAP3)

	platform_device_register(&omap2_mcspi3);

#endif

#ifdef CONFIG_ARCH_OMAP3

	platform_device_register(&omap2_mcspi4);

#endif

}



#else

static inline void omap_init_mcspi(void) {}

#endif



#ifdef CONFIG_SND_OMAP24XX_EAC



#define OMAP2_EAC_BASE			0x48090000



static struct resource omap2_eac_resources[] = {

	{

		.start		= OMAP2_EAC_BASE,

		.end		= OMAP2_EAC_BASE + 0x109,

		.flags		= IORESOURCE_MEM,

	},

};



static struct platform_device omap2_eac_device = {

	.name		= "omap24xx-eac",

	.id		= -1,

	.num_resources	= ARRAY_SIZE(omap2_eac_resources),

	.resource	= omap2_eac_resources,

	.dev = {

		.platform_data = NULL,

	},

};



void omap_init_eac(struct eac_platform_data *pdata)

{

	omap2_eac_device.dev.platform_data = pdata;

	platform_device_register(&omap2_eac_device);

}



#else

void omap_init_eac(struct eac_platform_data *pdata) {}

#endif



#ifdef CONFIG_OMAP_SHA1_MD5

static struct resource sha1_md5_resources[] = {

	{

		.start	= OMAP24XX_SEC_SHA1MD5_BASE,

		.end	= OMAP24XX_SEC_SHA1MD5_BASE + 0x64,

		.flags	= IORESOURCE_MEM,

	},

	{

		.start	= INT_24XX_SHA1MD5,

		.flags	= IORESOURCE_IRQ,

	}

};



static struct platform_device sha1_md5_device = {

	.name		= "OMAP SHA1/MD5",

	.id		= -1,

	.num_resources	= ARRAY_SIZE(sha1_md5_resources),

	.resource	= sha1_md5_resources,

};



static void omap_init_sha1_md5(void)

{

	platform_device_register(&sha1_md5_device);

}

#else

static inline void omap_init_sha1_md5(void) { }

#endif



#if defined(CONFIG_HDQ_MASTER_OMAP) || defined(CONFIG_HDQ_MASTER_OMAP_MODULE)

#if defined(CONFIG_ARCH_OMAP2430) || defined(CONFIG_ARCH_OMAP3430)

#define OMAP_HDQ_BASE	0x480B2000

#endif

static struct resource omap_hdq_resources[] = {

	{

		.start		= OMAP_HDQ_BASE,

		.end		= OMAP_HDQ_BASE + 0x1C,

		.flags		= IORESOURCE_MEM,

	},

	{

		.start		= INT_24XX_HDQ_IRQ,

		.flags		= IORESOURCE_IRQ,

	},

};

static struct platform_device omap_hdq_dev = {

	.name = "omap_hdq",

	.id = 0,

	.dev = {

		.platform_data = NULL,

	},

	.num_resources	= ARRAY_SIZE(omap_hdq_resources),

	.resource	= omap_hdq_resources,

};

static inline void omap_hdq_init(void)

{

	(void) platform_device_register(&omap_hdq_dev);

}

#else

static inline void omap_hdq_init(void) {}

#endif



/*-------------------------------------------------------------------------*/



static int __init omap2_init_devices(void)
@@ -208,10 +334,11 @@ static int __init omap2_init_devices(void) 
	/* please keep these calls, and their implementations above,

	 * in alphabetical order so they're easier to sort through.

	 */

	omap_init_i2c();

	omap_init_mbox();

	omap_init_mcspi();

	omap_hdq_init();

	omap_init_sti();

	omap_init_sha1_md5();



	return 0;

}

arch/arm/mach-omap2/gpmc.c

+58 −23
Original line number Diff line number Diff line
@@ -9,27 +9,23 @@ 
 * it under the terms of the GNU General Public License version 2 as

 * published by the Free Software Foundation.

 */

#undef DEBUG



#include <linux/kernel.h>

#include <linux/init.h>

#include <linux/err.h>

#include <linux/clk.h>

#include <linux/ioport.h>

#include <linux/spinlock.h>

#include <linux/module.h>



#include <asm/io.h>

#include <asm/mach-types.h>

#include <mach/gpmc.h>



#undef DEBUG



#ifdef CONFIG_ARCH_OMAP2420

#define GPMC_BASE		0x6800a000

#endif



#ifdef CONFIG_ARCH_OMAP2430

#define GPMC_BASE		0x6E000000

#endif

#include <mach/sdrc.h>



/* GPMC register offsets */

#define GPMC_REVISION		0x00

#define GPMC_SYSCONFIG		0x10

#define GPMC_SYSSTATUS		0x14
@@ -51,7 +47,6 @@ 
#define GPMC_CS0		0x60

#define GPMC_CS_SIZE		0x30



#define GPMC_CS_NUM		8

#define GPMC_MEM_START		0x00000000

#define GPMC_MEM_END		0x3FFFFFFF

#define BOOT_ROM_SPACE		0x100000	/* 1MB */
@@ -64,10 +59,9 @@ static struct resource gpmc_cs_mem[GPMC_CS_NUM]; 
static DEFINE_SPINLOCK(gpmc_mem_lock);

static unsigned		gpmc_cs_map;



static void __iomem *gpmc_base = IO_ADDRESS(GPMC_BASE);

static void __iomem *gpmc_cs_base = IO_ADDRESS(GPMC_BASE) + GPMC_CS0;

static void __iomem *gpmc_base;



static struct clk *gpmc_fck;

static struct clk *gpmc_l3_clk;



static void gpmc_write_reg(int idx, u32 val)

{
@@ -83,19 +77,32 @@ void gpmc_cs_write_reg(int cs, int idx, u32 val) 
{

	void __iomem *reg_addr;



	reg_addr = gpmc_cs_base + (cs * GPMC_CS_SIZE) + idx;

	reg_addr = gpmc_base + GPMC_CS0 + (cs * GPMC_CS_SIZE) + idx;

	__raw_writel(val, reg_addr);

}



u32 gpmc_cs_read_reg(int cs, int idx)

{

	return __raw_readl(gpmc_cs_base + (cs * GPMC_CS_SIZE) + idx);

	void __iomem *reg_addr;



	reg_addr = gpmc_base + GPMC_CS0 + (cs * GPMC_CS_SIZE) + idx;

	return __raw_readl(reg_addr);

}



/* TODO: Add support for gpmc_fck to clock framework and use it */

unsigned long gpmc_get_fclk_period(void)

{

	/* In picoseconds */

	return 1000000000 / ((clk_get_rate(gpmc_fck)) / 1000);

	unsigned long rate = clk_get_rate(gpmc_l3_clk);



	if (rate == 0) {

		printk(KERN_WARNING "gpmc_l3_clk not enabled\n");

		return 0;

	}



	rate /= 1000;

	rate = 1000000000 / rate;	/* In picoseconds */



	return rate;

}



unsigned int gpmc_ns_to_ticks(unsigned int time_ns)
@@ -108,6 +115,11 @@ unsigned int gpmc_ns_to_ticks(unsigned int time_ns) 
	return (time_ns * 1000 + tick_ps - 1) / tick_ps;

}



unsigned int gpmc_ticks_to_ns(unsigned int ticks)

{

	return ticks * gpmc_get_fclk_period() / 1000;

}



unsigned int gpmc_round_ns_to_ticks(unsigned int time_ns)

{

	unsigned long ticks = gpmc_ns_to_ticks(time_ns);
@@ -348,6 +360,7 @@ int gpmc_cs_request(int cs, unsigned long size, unsigned long *base) 
	spin_unlock(&gpmc_mem_lock);

	return r;

}

EXPORT_SYMBOL(gpmc_cs_request);



void gpmc_cs_free(int cs)

{
@@ -363,8 +376,9 @@ void gpmc_cs_free(int cs) 
	gpmc_cs_set_reserved(cs, 0);

	spin_unlock(&gpmc_mem_lock);

}

EXPORT_SYMBOL(gpmc_cs_free);



void __init gpmc_mem_init(void)

static void __init gpmc_mem_init(void)

{

	int cs;

	unsigned long boot_rom_space = 0;
@@ -394,12 +408,33 @@ void __init gpmc_mem_init(void) 
void __init gpmc_init(void)

{

	u32 l;

	char *ck;



	gpmc_fck = clk_get(NULL, "gpmc_fck"); /* Always on ENABLE_ON_INIT */

	if (IS_ERR(gpmc_fck))

		WARN_ON(1);

	if (cpu_is_omap24xx()) {

		ck = "core_l3_ck";

		if (cpu_is_omap2420())

			l = OMAP2420_GPMC_BASE;

		else

		clk_enable(gpmc_fck);

			l = OMAP34XX_GPMC_BASE;

	} else if (cpu_is_omap34xx()) {

		ck = "gpmc_fck";

		l = OMAP34XX_GPMC_BASE;

	}



	gpmc_l3_clk = clk_get(NULL, ck);

	if (IS_ERR(gpmc_l3_clk)) {

		printk(KERN_ERR "Could not get GPMC clock %s\n", ck);

		return -ENODEV;

	}



	gpmc_base = ioremap(l, SZ_4K);

	if (!gpmc_base) {

		clk_put(gpmc_l3_clk);

		printk(KERN_ERR "Could not get GPMC register memory\n");

		return -ENOMEM;

	}



	BUG_ON(IS_ERR(gpmc_l3_clk));



	l = gpmc_read_reg(GPMC_REVISION);

	printk(KERN_INFO "GPMC revision %d.%d\n", (l >> 4) & 0x0f, l & 0x0f);