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Commit 8dc5d8e8 authored by Alexandre Belloni's avatar Alexandre Belloni Committed by Nicolas Ferre
Browse files

ARM: at91/dt: define at91sam9rl clocks 



Define at91sam9rl clocks in at91sam9rl dtsi file.

Signed-off-by: default avatarAlexandre Belloni <alexandre.belloni@free-electrons.com>
Acked-by: default avatarBoris BREZILLON <b.brezillon.dev@gmail.com>
Signed-off-by: default avatarNicolas Ferre <nicolas.ferre@atmel.com>
parent 72a3fe97

arch/arm/boot/dts/at91sam9rl.dtsi

+226 −1
Original line number Diff line number Diff line
@@ -8,6 +8,7 @@ 


#include "skeleton.dtsi"

#include <dt-bindings/pinctrl/at91.h>

#include <dt-bindings/clk/at91.h>

#include <dt-bindings/interrupt-controller/irq.h>

#include <dt-bindings/gpio/gpio.h>
@@ -81,6 +82,8 @@ 
				interrupts = <16 IRQ_TYPE_LEVEL_HIGH 0>,

					     <17 IRQ_TYPE_LEVEL_HIGH 0>,

					     <18 IRQ_TYPE_LEVEL_HIGH 0>;

				clocks = <&tc0_clk>, <&tc1_clk>, <&tc2_clk>;

				clock-names = "t0_clk", "t1_clk", "t2_clk";

			};



			mmc0: mmc@fffa4000 {
@@ -90,6 +93,8 @@ 
				#address-cells = <1>;

				#size-cells = <0>;

				pinctrl-names = "default";

				clocks = <&mci0_clk>;

				clock-names = "mci_clk";

				status = "disabled";

			};
@@ -99,6 +104,7 @@ 
				interrupts = <11 IRQ_TYPE_LEVEL_HIGH 6>;

				#address-cells = <1>;

				#size-cells = <0>;

				clocks = <&twi0_clk>;

				status = "disabled";

			};
@@ -119,6 +125,8 @@ 
				atmel,use-dma-tx;

				pinctrl-names = "default";

				pinctrl-0 = <&pinctrl_usart0>;

				clocks = <&usart0_clk>;

				clock-names = "usart";

				status = "disabled";

			};
@@ -130,6 +138,8 @@ 
				atmel,use-dma-tx;

				pinctrl-names = "default";

				pinctrl-0 = <&pinctrl_usart1>;

				clocks = <&usart1_clk>;

				clock-names = "usart";

				status = "disabled";

			};
@@ -141,6 +151,8 @@ 
				atmel,use-dma-tx;

				pinctrl-names = "default";

				pinctrl-0 = <&pinctrl_usart2>;

				clocks = <&usart2_clk>;

				clock-names = "usart";

				status = "disabled";

			};
@@ -152,6 +164,8 @@ 
				atmel,use-dma-tx;

				pinctrl-names = "default";

				pinctrl-0 = <&pinctrl_usart3>;

				clocks = <&usart3_clk>;

				clock-names = "usart";

				status = "disabled";

			};
@@ -181,6 +195,8 @@ 
				interrupts = <13 IRQ_TYPE_LEVEL_HIGH 3>;

				pinctrl-names = "default";

				pinctrl-0 = <&pinctrl_spi0>;

				clocks = <&spi0_clk>;

				clock-names = "spi_clk";

				status = "disabled";

			};
@@ -203,6 +219,8 @@ 
				interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>;

				pinctrl-names = "default";

				pinctrl-0 = <&pinctrl_dbgu>;

				clocks = <&mck>;

				clock-names = "usart";

				status = "disabled";

			};
@@ -484,6 +502,7 @@ 
					gpio-controller;

					interrupt-controller;

					#interrupt-cells = <2>;

					clocks = <&pioA_clk>;

				};



				pioB: gpio@fffff600 {
@@ -494,6 +513,7 @@ 
					gpio-controller;

					interrupt-controller;

					#interrupt-cells = <2>;

					clocks = <&pioB_clk>;

				};



				pioC: gpio@fffff800 {
@@ -504,6 +524,7 @@ 
					gpio-controller;

					interrupt-controller;

					#interrupt-cells = <2>;

					clocks = <&pioC_clk>;

				};



				pioD: gpio@fffffa00 {
@@ -514,12 +535,215 @@ 
					gpio-controller;

					interrupt-controller;

					#interrupt-cells = <2>;

					clocks = <&pioD_clk>;

				};

			};



			pmc: pmc@fffffc00 {

				compatible = "atmel,at91rm9200-pmc";

				compatible = "atmel,at91sam9g45-pmc";

				reg = <0xfffffc00 0x100>;

				interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>;

				interrupt-controller;

				#address-cells = <1>;

				#size-cells = <0>;

				#interrupt-cells = <1>;



				clk32k: slck {

					compatible = "fixed-clock";

					#clock-cells = <0>;

					clock-frequency = <32768>;

				};



				main: mainck {

					compatible = "atmel,at91rm9200-clk-main";

					#clock-cells = <0>;

					interrupts-extended = <&pmc AT91_PMC_MOSCS>;

					clocks = <&clk32k>;

				};



				plla: pllack {

					compatible = "atmel,at91rm9200-clk-pll";

					#clock-cells = <0>;

					interrupts-extended = <&pmc AT91_PMC_LOCKA>;

					clocks = <&main>;

					reg = <0>;

					atmel,clk-input-range = <1000000 32000000>;

					#atmel,pll-clk-output-range-cells = <4>;

					atmel,pll-clk-output-ranges = <80000000 200000000 190000000 240000000>;

				};



				utmi: utmick {

					compatible = "atmel,at91sam9x5-clk-utmi";

					#clock-cells = <0>;

					interrupt-parent = <&pmc>;

					interrupts = <AT91_PMC_LOCKU>;

					clocks = <&main>;

				};



				mck: masterck {

					compatible = "atmel,at91rm9200-clk-master";

					#clock-cells = <0>;

					interrupts-extended = <&pmc AT91_PMC_MCKRDY>;

					clocks = <&clk32k>, <&main>, <&plla>, <&utmi>;

					atmel,clk-output-range = <0 94000000>;

					atmel,clk-divisors = <1 2 4 3>;

				};



				prog: progck {

					compatible = "atmel,at91rm9200-clk-programmable";

					#address-cells = <1>;

					#size-cells = <0>;

					interrupt-parent = <&pmc>;

					clocks = <&clk32k>, <&main>, <&plla>, <&utmi>, <&mck>;



					prog0: prog0 {

						#clock-cells = <0>;

						reg = <0>;

						interrupts = <AT91_PMC_PCKRDY(0)>;

					};



					prog1: prog1 {

						#clock-cells = <0>;

						reg = <1>;

						interrupts = <AT91_PMC_PCKRDY(1)>;

					};

				};



				systemck {

					compatible = "atmel,at91rm9200-clk-system";

					#address-cells = <1>;

					#size-cells = <0>;



					pck0: pck0 {

						#clock-cells = <0>;

						reg = <8>;

						clocks = <&prog0>;

					};



					pck1: pck1 {

						#clock-cells = <0>;

						reg = <9>;

						clocks = <&prog1>;

					};



				};



				periphck {

					compatible = "atmel,at91rm9200-clk-peripheral";

					#address-cells = <1>;

					#size-cells = <0>;

					clocks = <&mck>;



					pioA_clk: pioA_clk {

						#clock-cells = <0>;

						reg = <2>;

					};



					pioB_clk: pioB_clk {

						#clock-cells = <0>;

						reg = <3>;

					};



					pioC_clk: pioC_clk {

						#clock-cells = <0>;

						reg = <4>;

					};



					pioD_clk: pioD_clk {

						#clock-cells = <0>;

						reg = <5>;

					};



					usart0_clk: usart0_clk {

						#clock-cells = <0>;

						reg = <6>;

					};



					usart1_clk: usart1_clk {

						#clock-cells = <0>;

						reg = <7>;

					};



					usart2_clk: usart2_clk {

						#clock-cells = <0>;

						reg = <8>;

					};



					usart3_clk: usart3_clk {

						#clock-cells = <0>;

						reg = <9>;

					};



					mci0_clk: mci0_clk {

						#clock-cells = <0>;

						reg = <10>;

					};



					twi0_clk: twi0_clk {

						#clock-cells = <0>;

						reg = <11>;

					};



					twi1_clk: twi1_clk {

						#clock-cells = <0>;

						reg = <12>;

					};



					spi0_clk: spi0_clk {

						#clock-cells = <0>;

						reg = <13>;

					};



					ssc0_clk: ssc0_clk {

						#clock-cells = <0>;

						reg = <14>;

					};



					ssc1_clk: ssc1_clk {

						#clock-cells = <0>;

						reg = <15>;

					};



					tc0_clk: tc0_clk {

						#clock-cells = <0>;

						reg = <16>;

					};



					tc1_clk: tc1_clk {

						#clock-cells = <0>;

						reg = <17>;

					};



					tc2_clk: tc2_clk {

						#clock-cells = <0>;

						reg = <18>;

					};



					pwm_clk: pwm_clk {

						#clock-cells = <0>;

						reg = <19>;

					};



					adc_clk: adc_clk {

						#clock-cells = <0>;

						reg = <20>;

					};



					dma0_clk: dma0_clk {

						#clock-cells = <0>;

						reg = <21>;

					};



					udphs_clk: udphs_clk {

						#clock-cells = <0>;

						reg = <22>;

					};



					lcd_clk: lcd_clk {

						#clock-cells = <0>;

						reg = <23>;

					};

				};

			};



			rstc@fffffd00 {
@@ -536,6 +760,7 @@ 
				compatible = "atmel,at91sam9260-pit";

				reg = <0xfffffd30 0xf>;

				interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>;

				clocks = <&mck>;

			};



			watchdog@fffffd40 {