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Commit 8dac1e1f authored by Ville Syrjälä's avatar Ville Syrjälä
Browse files

drm/i915: Clean up the extra RPM ref on CHV with i915.enable_rc6=0 



Remove the CHV early bail out from intel_cleanup_gt_powersave() so that
we'll clean up the extra RPM reference held due to i915.enable_rc6=0.

Cc: Imre Deak <imre.deak@intel.com>
Fixes: b268c699 ("drm/i915: refactor RPM disabling due to RC6 being disabled")
Signed-off-by: default avatarVille Syrjälä <ville.syrjala@linux.intel.com>
Link: http://patchwork.freedesktop.org/patch/msgid/1470136053-23276-1-git-send-email-ville.syrjala@linux.intel.com


Reviewed-by: default avatarImre Deak <imre.deak@intel.com>
parent 96a945aa

drivers/gpu/drm/i915/intel_pm.c

+1 −3
Original line number Diff line number Diff line
@@ -6541,9 +6541,7 @@ void intel_init_gt_powersave(struct drm_i915_private *dev_priv) 


void intel_cleanup_gt_powersave(struct drm_i915_private *dev_priv)

{

	if (IS_CHERRYVIEW(dev_priv))

		return;

	else if (IS_VALLEYVIEW(dev_priv))

	if (IS_VALLEYVIEW(dev_priv))

		valleyview_cleanup_gt_powersave(dev_priv);



	if (!i915.enable_rc6)