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Commit 8d1d8fcb authored by Ram Amrani's avatar Ram Amrani Committed by David S. Miller
Browse files

qed: configure ll2 RoCE v1/v2 flavor correctly 



Currently RoCE v2 won't operate with RDMA CM due to missing setting of
the roce-flavour in the ll2 configuration.
This patch properly sets the flavour, and deletes incorrect HSI
that doesn't [yet] exist.

Fixes: abd49676 ("qed: Add RoCE ll2 & GSI support")
Signed-off-by: default avatarRam Amrani <Ram.Amrani@cavium.com>
Signed-off-by: default avatarYuval Mintz <Yuval.Mintz@cavium.com>
Signed-off-by: default avatarDavid S. Miller <davem@davemloft.net>
parent 0ace81ec

drivers/net/ethernet/qlogic/qed/qed_hsi.h

+0 −3
Original line number Diff line number Diff line
@@ -727,9 +727,6 @@ struct core_tx_bd_flags { 
#define CORE_TX_BD_FLAGS_L4_PROTOCOL_SHIFT	6

#define CORE_TX_BD_FLAGS_L4_PSEUDO_CSUM_MODE_MASK	0x1

#define CORE_TX_BD_FLAGS_L4_PSEUDO_CSUM_MODE_SHIFT 7

#define CORE_TX_BD_FLAGS_ROCE_FLAV_MASK		0x1

#define CORE_TX_BD_FLAGS_ROCE_FLAV_SHIFT	12



};



struct core_tx_bd {

drivers/net/ethernet/qlogic/qed/qed_ll2.c

+1 −0
Original line number Diff line number Diff line
@@ -1119,6 +1119,7 @@ static void qed_ll2_prepare_tx_packet_set_bd(struct qed_hwfn *p_hwfn, 
	start_bd->bd_flags.as_bitfield |= CORE_TX_BD_FLAGS_START_BD_MASK <<

	    CORE_TX_BD_FLAGS_START_BD_SHIFT;

	SET_FIELD(start_bd->bitfield0, CORE_TX_BD_NBDS, num_of_bds);

	SET_FIELD(start_bd->bitfield0, CORE_TX_BD_ROCE_FLAV, type);

	DMA_REGPAIR_LE(start_bd->addr, first_frag);

	start_bd->nbytes = cpu_to_le16(first_frag_len);