Merge commit 'gcl/next' into next

---------------------

On the mpc5200 and 5200b, GPT0 has a watchdog timer function.  If the board

design supports the internal wdt, then the device node for GPT0 should

include the empty property 'fsl,has-wdt'.

include the empty property 'fsl,has-wdt'.  Note that this does not activate

the watchdog.  The timer will function as a GPT if the timer api is used, and

it will function as watchdog if the watchdog device is used.  The watchdog

mode has priority over the gpt mode, i.e. if the watchdog is activated, any

gpt api call to this timer will fail with -EBUSY.

If you add the property

	fsl,wdt-on-boot = <n>;

GPT0 will be marked as in-use watchdog, i.e. blocking every gpt access to it.

If n>0, the watchdog is started with a timeout of n seconds.  If n=0, the

configuration of the watchdog is not touched.  This is useful in two cases:

- just mark GPT0 as watchdog, blocking gpt accesses, and configure it later;

- do not touch a configuration assigned by the boot loader which supervises

  the boot process itself.

The watchdog will respect the CONFIG_WATCHDOG_NOWAYOUT option.

An mpc5200-gpt can be used as a single line GPIO controller.  To do so,

add the following properties to the gpt node:

extern unsigned int mpc52xx_get_xtal_freq(struct device_node *node);

extern void mpc52xx_restart(char *cmd);

/* mpc52xx_gpt.c */

struct mpc52xx_gpt_priv;

extern struct mpc52xx_gpt_priv *mpc52xx_gpt_from_irq(int irq);

extern int mpc52xx_gpt_start_timer(struct mpc52xx_gpt_priv *gpt, u64 period,

                            int continuous);

extern u64 mpc52xx_gpt_timer_period(struct mpc52xx_gpt_priv *gpt);

extern int mpc52xx_gpt_stop_timer(struct mpc52xx_gpt_priv *gpt);

/* mpc52xx_lpbfifo.c */

#define MPC52XX_LPBFIFO_FLAG_READ		(0)

#define MPC52XX_LPBFIFO_FLAG_WRITE		(1<<0)

#define MPC52XX_LPBFIFO_FLAG_NO_INCREMENT	(1<<1)

#define MPC52XX_LPBFIFO_FLAG_NO_DMA		(1<<2)

#define MPC52XX_LPBFIFO_FLAG_POLL_DMA		(1<<3)

struct mpc52xx_lpbfifo_request {

	struct list_head list;

	/* localplus bus address */

	unsigned int cs;

	size_t offset;

	/* Memory address */

	void *data;

	phys_addr_t data_phys;

	/* Details of transfer */

	size_t size;

	size_t pos;	/* current position of transfer */

	int flags;

	/* What to do when finished */

	void (*callback)(struct mpc52xx_lpbfifo_request *);

	void *priv;		/* Driver private data */

	/* statistics */

	int irq_count;

	int irq_ticks;

	u8 last_byte;

	int buffer_not_done_cnt;

};

extern int mpc52xx_lpbfifo_submit(struct mpc52xx_lpbfifo_request *req);

extern void mpc52xx_lpbfifo_abort(struct mpc52xx_lpbfifo_request *req);

extern void mpc52xx_lpbfifo_poll(void);

/* mpc52xx_pic.c */

extern void mpc52xx_init_irq(void);

extern unsigned int mpc52xx_get_irq(void);

		dest++;

		n--;

	}

	while(n > 4) {

	while(n >= 4) {

		*((u32 *)dest) = *((volatile u32 *)vsrc);

		eieio();

		vsrc += 4;

		vdest++;

		n--;

	}

	while(n > 4) {

	while(n >= 4) {

		*((volatile u32 *)vdest) = *((volatile u32 *)src);

		src += 4;

		vdest += 4;

	select GENERIC_GPIO

	help

	  Enable gpiolib support for mpc5200 based boards

config PPC_MPC5200_LPBFIFO

	tristate "MPC5200 LocalPlus bus FIFO driver"

	depends on PPC_MPC52xx

	select PPC_BESTCOMM_GEN_BD

endif

obj-$(CONFIG_PPC_MPC5200_GPIO)	+= mpc52xx_gpio.o

obj-$(CONFIG_PPC_MPC5200_LPBFIFO)	+= mpc52xx_lpbfifo.o