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Commit 8bc964aa authored by Geert Uytterhoeven's avatar Geert Uytterhoeven Committed by Simon Horman
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clk: shmobile: r8a7778: Add CPG/MSTP Clock Domain support 



Add Clock Domain support to the R-Car M1A Clock Pulse Generator (CPG)
driver using the generic PM Domain.  This allows to power-manage the
module clocks of SoC devices that are part of the CPG/MSTP Clock Domain
using Runtime PM, or for system suspend/resume.

SoC devices that are part of the CPG/MSTP Clock Domain and can be
power-managed through an MSTP clock should be tagged in DT with a proper
"power-domains" property.

Signed-off-by: default avatarGeert Uytterhoeven <geert+renesas@glider.be>
Acked-by: default avatarStephen Boyd <sboyd@codeaurora.org>
Reviewed-by: default avatarUlf Hansson <ulf.hansson@linaro.org>
Signed-off-by: default avatarSimon Horman <horms+renesas@verge.net.au>
parent 752b5ed5

Documentation/devicetree/bindings/clock/renesas,r8a7778-cpg-clocks.txt

+26 −3
Original line number Diff line number Diff line 
* Renesas R8A7778 Clock Pulse Generator (CPG)



The CPG generates core clocks for the R8A7778. It includes two PLLs and

several fixed ratio dividers

several fixed ratio dividers.

The CPG also provides a Clock Domain for SoC devices, in combination with the

CPG Module Stop (MSTP) Clocks.



Required Properties:
@@ -10,10 +12,18 @@ Required Properties: 
  - #clock-cells: Must be 1

  - clock-output-names: The names of the clocks. Supported clocks are

    "plla", "pllb", "b", "out", "p", "s", and "s1".

  - #power-domain-cells: Must be 0



SoC devices that are part of the CPG/MSTP Clock Domain and can be power-managed

through an MSTP clock should refer to the CPG device node in their

"power-domains" property, as documented by the generic PM domain bindings in

Documentation/devicetree/bindings/power/power_domain.txt.



Example

-------



Examples

--------



  - CPG device node:



	cpg_clocks: cpg_clocks@ffc80000 {

		compatible = "renesas,r8a7778-cpg-clocks";
@@ -22,4 +32,17 @@ Example 
		clocks = <&extal_clk>;

		clock-output-names = "plla", "pllb", "b",

				     "out", "p", "s", "s1";

		#power-domain-cells = <0>;

	};





  - CPG/MSTP Clock Domain member device node:



	sdhi0: sd@ffe4c000 {

		compatible = "renesas,sdhi-r8a7778";

		reg = <0xffe4c000 0x100>;

		interrupts = <0 87 IRQ_TYPE_LEVEL_HIGH>;

		clocks = <&mstp3_clks R8A7778_CLK_SDHI0>;

		power-domains = <&cpg_clocks>;

		status = "disabled";

	};

arch/arm/mach-shmobile/Kconfig

+1 −0
Original line number Diff line number Diff line
@@ -4,6 +4,7 @@ config ARCH_SHMOBILE 


config PM_RCAR

	bool

	select PM_GENERIC_DOMAINS if PM



config PM_RMOBILE

	bool

drivers/clk/shmobile/clk-r8a7778.c

+2 −0
Original line number Diff line number Diff line
@@ -124,6 +124,8 @@ static void __init r8a7778_cpg_clocks_init(struct device_node *np) 
	}



	of_clk_add_provider(np, of_clk_src_onecell_get, &cpg->data);



	cpg_mstp_add_clk_domain(np);

}



CLK_OF_DECLARE(r8a7778_cpg_clks, "renesas,r8a7778-cpg-clocks",