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Commit 8baebe30 authored by Arnd Bergmann's avatar Arnd Bergmann
Browse files

Merge tag 'v3.18-rockchip-dma' of... 

Merge tag 'v3.18-rockchip-dma' of git://git.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip into next/dt

Pull "rockchip dma support" from Heiko Stuebner:

Enable the AMBA bus and add necessary dma-controller dts nodes

* tag 'v3.18-rockchip-dma' of git://git.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip

:
  ARM: dts: rockchip: add rk3066 and rk3188 dma controllers
  ARM: dts: rockchip: add rk3288 dma controllers
  ARM: rockchip: enable the AMBA bus

Signed-off-by: default avatarArnd Bergmann <arnd@arndb.de>
parents c30131cf ac42f481

arch/arm/boot/dts/rk3288.dtsi

+38 −0
Original line number Diff line number Diff line
@@ -62,6 +62,44 @@ 
		};

	};



	amba {

		compatible = "arm,amba-bus";

		#address-cells = <1>;

		#size-cells = <1>;

		ranges;



		dmac_peri: dma-controller@ff250000 {

			compatible = "arm,pl330", "arm,primecell";

			reg = <0xff250000 0x4000>;

			interrupts = <GIC_SPI 2 IRQ_TYPE_LEVEL_HIGH>,

				     <GIC_SPI 3 IRQ_TYPE_LEVEL_HIGH>;

			#dma-cells = <1>;

			clocks = <&cru ACLK_DMAC2>;

			clock-names = "apb_pclk";

		};



		dmac_bus_ns: dma-controller@ff600000 {

			compatible = "arm,pl330", "arm,primecell";

			reg = <0xff600000 0x4000>;

			interrupts = <GIC_SPI 0 IRQ_TYPE_LEVEL_HIGH>,

				     <GIC_SPI 1 IRQ_TYPE_LEVEL_HIGH>;

			#dma-cells = <1>;

			clocks = <&cru ACLK_DMAC1>;

			clock-names = "apb_pclk";

			status = "disabled";

		};



		dmac_bus_s: dma-controller@ffb20000 {

			compatible = "arm,pl330", "arm,primecell";

			reg = <0xffb20000 0x4000>;

			interrupts = <GIC_SPI 0 IRQ_TYPE_LEVEL_HIGH>,

				     <GIC_SPI 1 IRQ_TYPE_LEVEL_HIGH>;

			#dma-cells = <1>;

			clocks = <&cru ACLK_DMAC1>;

			clock-names = "apb_pclk";

		};

	};



	xin24m: oscillator {

		compatible = "fixed-clock";

		clock-frequency = <24000000>;

arch/arm/boot/dts/rk3xxx.dtsi

+38 −0
Original line number Diff line number Diff line
@@ -28,6 +28,44 @@ 
		i2c4 = &i2c4;

	};



	amba {

		compatible = "arm,amba-bus";

		#address-cells = <1>;

		#size-cells = <1>;

		ranges;



		dmac1_s: dma-controller@20018000 {

			compatible = "arm,pl330", "arm,primecell";

			reg = <0x20018000 0x4000>;

			interrupts = <GIC_SPI 0 IRQ_TYPE_LEVEL_HIGH>,

				     <GIC_SPI 1 IRQ_TYPE_LEVEL_HIGH>;

			#dma-cells = <1>;

			clocks = <&cru ACLK_DMA1>;

			clock-names = "apb_pclk";

		};



		dmac1_ns: dma-controller@2001c000 {

			compatible = "arm,pl330", "arm,primecell";

			reg = <0x2001c000 0x4000>;

			interrupts = <GIC_SPI 0 IRQ_TYPE_LEVEL_HIGH>,

				     <GIC_SPI 1 IRQ_TYPE_LEVEL_HIGH>;

			#dma-cells = <1>;

			clocks = <&cru ACLK_DMA1>;

			clock-names = "apb_pclk";

			status = "disabled";

		};



		dmac2: dma-controller@20078000 {

			compatible = "arm,pl330", "arm,primecell";

			reg = <0x20078000 0x4000>;

			interrupts = <GIC_SPI 2 IRQ_TYPE_LEVEL_HIGH>,

				     <GIC_SPI 3 IRQ_TYPE_LEVEL_HIGH>;

			#dma-cells = <1>;

			clocks = <&cru ACLK_DMA2>;

			clock-names = "apb_pclk";

		};

	};



	xin24m: oscillator {

		compatible = "fixed-clock";

		clock-frequency = <24000000>;

arch/arm/mach-rockchip/Kconfig

+1 −0
Original line number Diff line number Diff line
@@ -4,6 +4,7 @@ config ARCH_ROCKCHIP 
	select PINCTRL_ROCKCHIP

	select ARCH_HAS_RESET_CONTROLLER

	select ARCH_REQUIRE_GPIOLIB

	select ARM_AMBA

	select ARM_GIC

	select CACHE_L2X0

	select HAVE_ARM_ARCH_TIMER