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Commit 8b3bca29 authored by Peter Ujfalusi's avatar Peter Ujfalusi Committed by Mark Brown
Browse files

ASoC: twl4030: Introduce local ctl register cache 



Few registers need to be cached in the codec driver level. These registers
should only be written when the path is active to avoid pop noise on the
given path.
This patch adds an array which covers the range where the sensitive registers
are located and uppon loadinf the driver the ctl cache will be initialized.

Signed-off-by: default avatarPeter Ujfalusi <peter.ujfalusi@ti.com>
Signed-off-by: default avatarMark Brown <broonie@linaro.org>
parent 0dc41562

sound/soc/codecs/twl4030.c

+15 −0
Original line number Diff line number Diff line
@@ -150,10 +150,22 @@ struct twl4030_priv { 
	u8 earpiece_enabled;

	u8 predrivel_enabled, predriver_enabled;

	u8 carkitl_enabled, carkitr_enabled;

	u8 ctl_cache[TWL4030_REG_PRECKR_CTL - TWL4030_REG_EAR_CTL + 1];



	struct twl4030_codec_data *pdata;

};



static void tw4030_init_ctl_cache(struct twl4030_priv *twl4030)

{

	int i;

	u8 byte;



	for (i = TWL4030_REG_EAR_CTL; i <= TWL4030_REG_PRECKR_CTL; i++) {

		twl_i2c_read_u8(TWL4030_MODULE_AUDIO_VOICE, &byte, i);

		twl4030->ctl_cache[i - TWL4030_REG_EAR_CTL] = byte;

	}

}



/*

 * read twl4030 register cache

 */
@@ -348,6 +360,9 @@ static void twl4030_init_chip(struct snd_soc_codec *codec) 
		}

	}



	/* Initialize the local ctl register cache */

	tw4030_init_ctl_cache(twl4030);



	/* Refresh APLL_CTL register from HW */

	twl_i2c_read_u8(TWL4030_MODULE_AUDIO_VOICE, &byte,

			    TWL4030_REG_APLL_CTL);