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Commit 8ad75019 authored by Bjorn Helgaas's avatar Bjorn Helgaas
Browse files

PCI: designware: Export dw_pcie_readl_rc(), dw_pcie_writel_rc() 



Export dw_pcie_readl_rc() and dw_pcie_writel_rc().  Many other drivers can
use these instead of implementing their own versions.  No functional change
intended.

Signed-off-by: default avatarBjorn Helgaas <bhelgaas@google.com>
parent ad880218

drivers/pci/host/pcie-designware.c

+2 −2
Original line number Diff line number Diff line
@@ -141,7 +141,7 @@ int dw_pcie_cfg_write(void __iomem *addr, int size, u32 val) 
	return PCIBIOS_SUCCESSFUL;

}



static inline u32 dw_pcie_readl_rc(struct pcie_port *pp, u32 reg)

u32 dw_pcie_readl_rc(struct pcie_port *pp, u32 reg)

{

	if (pp->ops->readl_rc)

		return pp->ops->readl_rc(pp, reg);
@@ -149,7 +149,7 @@ static inline u32 dw_pcie_readl_rc(struct pcie_port *pp, u32 reg) 
	return readl(pp->dbi_base + reg);

}



static inline void dw_pcie_writel_rc(struct pcie_port *pp, u32 reg, u32 val)

void dw_pcie_writel_rc(struct pcie_port *pp, u32 reg, u32 val)

{

	if (pp->ops->writel_rc)

		pp->ops->writel_rc(pp, reg, val);

drivers/pci/host/pcie-designware.h

+2 −0
Original line number Diff line number Diff line
@@ -72,6 +72,8 @@ struct pcie_host_ops { 
	int (*msi_host_init)(struct pcie_port *pp, struct msi_controller *chip);

};



u32 dw_pcie_readl_rc(struct pcie_port *pp, u32 reg);

void dw_pcie_writel_rc(struct pcie_port *pp, u32 reg, u32 val);

int dw_pcie_cfg_read(void __iomem *addr, int size, u32 *val);

int dw_pcie_cfg_write(void __iomem *addr, int size, u32 val);

irqreturn_t dw_handle_msi_irq(struct pcie_port *pp);