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Commit 88bc3054 authored by Michael Hennerich's avatar Michael Hennerich Committed by Greg Kroah-Hartman
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IIO: ADC: New driver for AD7792/AD7793 3 Channel SPI ADC 



New driver for AD7792/AD7793 3-Channel, Low Noise,
Low Power, 16-/24-Bit Sigma-Delta ADC with On-Chip In-Amp
and Reference.

The AD7792/AD7793 features a dual use data out ready DOUT/RDY output.
In order to avoid contentions on the SPI bus, it's necessary to use
spi bus locking. The DOUT/RDY output must also be wired to an
interrupt capable GPIO.

In INDIO_RING_TRIGGERED mode, this driver may block its SPI bus segment
for an extended period of time.

Changes since V1:

Use bool where applicable.
Use data buffer that lives in their own cache line.
Restructure ad7793_calibrate_all to use an array.
Use msleep.
Query REG_ID instead of doing a write/read This is a test.
Add support for unipolar mode.
Drop range attribute in favor of write scale.
Add proper locking.
Use new validate_trigger callbacks.
Use IIO_IN_DIFF for differential channels.
Change attribute naming.
Use available_scan_masks.
Some other miscellaneous cleanup (none functional changes).

Signed-off-by: default avatarMichael Hennerich <michael.hennerich@analog.com>
Acked-by: default avatarJonathan Cameron <jic23@cam.ac.uk>
Signed-off-by: default avatarGreg Kroah-Hartman <gregkh@suse.de>
parent 3fd47d44

drivers/staging/iio/adc/Kconfig

+14 −0
Original line number Diff line number Diff line
@@ -130,6 +130,20 @@ config AD7780 
	  To compile this driver as a module, choose M here: the

	  module will be called ad7780.



config AD7793

	tristate "Analog Devices AD7792 AD7793 ADC driver"

	depends on SPI

	select IIO_RING_BUFFER

	select IIO_SW_RING

	select IIO_TRIGGER

	help

	  Say yes here to build support for Analog Devices

	  AD7792 and AD7793 SPI analog to digital convertors (ADC).

	  If unsure, say N (but it's safe to say "Y").



	  To compile this driver as a module, choose M here: the

	  module will be called AD7793.



config AD7745

	tristate "Analog Devices AD7745, AD7746 AD7747 capacitive sensor driver"

	depends on I2C

drivers/staging/iio/adc/Makefile

+1 −0
Original line number Diff line number Diff line
@@ -35,6 +35,7 @@ obj-$(CONFIG_AD7291) += ad7291.o 
obj-$(CONFIG_AD7314) += ad7314.o

obj-$(CONFIG_AD7745) += ad7745.o

obj-$(CONFIG_AD7780) += ad7780.o

obj-$(CONFIG_AD7793) += ad7793.o

obj-$(CONFIG_AD7816) += ad7816.o

obj-$(CONFIG_ADT75) += adt75.o

obj-$(CONFIG_ADT7310) += adt7310.o

drivers/staging/iio/adc/ad7793.c

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+987 −0

File added.

Preview size limit exceeded, changes collapsed.

drivers/staging/iio/adc/ad7793.h

0 → 100644
+107 −0
Original line number Diff line number Diff line 
/*

 * AD7792/AD7793 SPI ADC driver

 *

 * Copyright 2011 Analog Devices Inc.

 *

 * Licensed under the GPL-2.

 */

#ifndef IIO_ADC_AD7793_H_

#define IIO_ADC_AD7793_H_



/*

 * TODO: struct ad7793_platform_data needs to go into include/linux/iio

 */



/* Registers */

#define AD7793_REG_COMM		0 /* Communications Register (WO, 8-bit) */

#define AD7793_REG_STAT		0 /* Status Register	     (RO, 8-bit) */

#define AD7793_REG_MODE		1 /* Mode Register	     (RW, 16-bit */

#define AD7793_REG_CONF		2 /* Configuration Register  (RW, 16-bit) */

#define AD7793_REG_DATA		3 /* Data Register	     (RO, 16-/24-bit) */

#define AD7793_REG_ID		4 /* ID Register	     (RO, 8-bit) */

#define AD7793_REG_IO		5 /* IO Register	     (RO, 8-bit) */

#define AD7793_REG_OFFSET	6 /* Offset Register	     (RW, 16-bit

				   * (AD7792)/24-bit (AD7793)) */

#define AD7793_REG_FULLSALE	7 /* Full-Scale Register

				   * (RW, 16-bit (AD7792)/24-bit (AD7793)) */



/* Communications Register Bit Designations (AD7793_REG_COMM) */

#define AD7793_COMM_WEN		(1 << 7) /* Write Enable */

#define AD7793_COMM_WRITE	(0 << 6) /* Write Operation */

#define AD7793_COMM_READ	(1 << 6) /* Read Operation */

#define AD7793_COMM_ADDR(x)	(((x) & 0x7) << 3) /* Register Address */

#define AD7793_COMM_CREAD	(1 << 2) /* Continuous Read of Data Register */



/* Status Register Bit Designations (AD7793_REG_STAT) */

#define AD7793_STAT_RDY		(1 << 7) /* Ready */

#define AD7793_STAT_ERR		(1 << 6) /* Error (Overrange, Underrange) */

#define AD7793_STAT_CH3		(1 << 2) /* Channel 3 */

#define AD7793_STAT_CH2		(1 << 1) /* Channel 2 */

#define AD7793_STAT_CH1		(1 << 0) /* Channel 1 */



/* Mode Register Bit Designations (AD7793_REG_MODE) */

#define AD7793_MODE_SEL(x)	(((x) & 0x7) << 13) /* Operation Mode Select */

#define AD7793_MODE_CLKSRC(x)	(((x) & 0x3) << 6) /* ADC Clock Source Select */

#define AD7793_MODE_RATE(x)	((x) & 0xF) /* Filter Update Rate Select */



#define AD7793_MODE_CONT		0 /* Continuous Conversion Mode */

#define AD7793_MODE_SINGLE		1 /* Single Conversion Mode */

#define AD7793_MODE_IDLE		2 /* Idle Mode */

#define AD7793_MODE_PWRDN		3 /* Power-Down Mode */

#define AD7793_MODE_CAL_INT_ZERO	4 /* Internal Zero-Scale Calibration */

#define AD7793_MODE_CAL_INT_FULL	5 /* Internal Full-Scale Calibration */

#define AD7793_MODE_CAL_SYS_ZERO	6 /* System Zero-Scale Calibration */

#define AD7793_MODE_CAL_SYS_FULL	7 /* System Full-Scale Calibration */



#define AD7793_CLK_INT		0 /* Internal 64 kHz Clock not

				   * available at the CLK pin */

#define AD7793_CLK_INT_CO	1 /* Internal 64 kHz Clock available

				   * at the CLK pin */

#define AD7793_CLK_EXT		2 /* External 64 kHz Clock */

#define AD7793_CLK_EXT_DIV2	3 /* External Clock divided by 2 */



/* Configuration Register Bit Designations (AD7793_REG_CONF) */

#define AD7793_CONF_VBIAS(x)	(((x) & 0x3) << 14) /* Bias Voltage

						     * Generator Enable */

#define AD7793_CONF_BO_EN	(1 << 13) /* Burnout Current Enable */

#define AD7793_CONF_UNIPOLAR	(1 << 12) /* Unipolar/Bipolar Enable */

#define AD7793_CONF_BOOST	(1 << 11) /* Boost Enable */

#define AD7793_CONF_GAIN(x)	(((x) & 0x7) << 8) /* Gain Select */

#define AD7793_CONF_REFSEL	(1 << 7) /* INT/EXT Reference Select */

#define AD7793_CONF_BUF		(1 << 4) /* Buffered Mode Enable */

#define AD7793_CONF_CHAN(x)	((x) & 0x7) /* Channel select */



#define AD7793_CH_AIN1P_AIN1M	0 /* AIN1(+) - AIN1(-) */

#define AD7793_CH_AIN2P_AIN2M	1 /* AIN2(+) - AIN2(-) */

#define AD7793_CH_AIN3P_AIN3M	2 /* AIN3(+) - AIN3(-) */

#define AD7793_CH_AIN1M_AIN1M	3 /* AIN1(-) - AIN1(-) */

#define AD7793_CH_TEMP		6 /* Temp Sensor */

#define AD7793_CH_AVDD_MONITOR	7 /* AVDD Monitor */



/* ID Register Bit Designations (AD7793_REG_ID) */

#define AD7792_ID		0xA

#define AD7793_ID		0xB

#define AD7793_ID_MASK		0xF



/* IO (Excitation Current Sources) Register Bit Designations (AD7793_REG_IO) */

#define AD7793_IO_IEXC1_IOUT1_IEXC2_IOUT2	0 /* IEXC1 connect to IOUT1,

						   * IEXC2 connect to IOUT2 */

#define AD7793_IO_IEXC1_IOUT2_IEXC2_IOUT1	1 /* IEXC1 connect to IOUT2,

						   * IEXC2 connect to IOUT1 */

#define AD7793_IO_IEXC1_IEXC2_IOUT1		2 /* Both current sources

						   * IEXC1,2 connect to IOUT1 */

#define AD7793_IO_IEXC1_IEXC2_IOUT2		3 /* Both current sources

						   * IEXC1,2 connect to IOUT2 */



#define AD7793_IO_IXCEN_10uA	(1 << 0) /* Excitation Current 10uA */

#define AD7793_IO_IXCEN_210uA	(2 << 0) /* Excitation Current 210uA */

#define AD7793_IO_IXCEN_1mA	(3 << 0) /* Excitation Current 1mA */



struct ad7793_platform_data {

	u16			vref_mv;

	u16			mode;

	u16			conf;

	u8			io;

};



#endif /* IIO_ADC_AD7793_H_ */