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Commit 88a99886 authored by Linus Torvalds's avatar Linus Torvalds
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Pull pin control updates from Linus Walleij:
 "This is the bulk of pin control changes for the v4.3 development
  cycle.

  Like with GPIO it's a lot of stuff.  If my subsystems are any sign of
  the overall tempo of the kernel v4.3 will be a gigantic diff.

[ It looks like 4.3 is calmer than 4.2 in most other subsystems, but
  we'll see - Linus ]

  Core changes:

   - It is possible configure groups in debugfs.

   - Consolidation of chained IRQ handler install/remove replacing all
     call sites where irq_set_handler_data() and
     irq_set_chained_handler() were done in succession with a combined
     call to irq_set_chained_handler_and_data().  This series was
     created by Thomas Gleixner after the problem was observed by
     Russell King.

   - Tglx also made another series of patches switching
     __irq_set_handler_locked() for irq_set_handler_locked() which is
     way cleaner.

   - Tglx also wrote a good bunch of patches to make use of
     irq_desc_get_xxx() accessors and avoid looking up irq_descs from
     IRQ numbers.  The goal is to get rid of the irq number from the
     handlers in the IRQ flow which is nice.

  Driver feature enhancements:

   - Power management support for the SiRF SoC Atlas 7.

   - Power down support for the Qualcomm driver.

   - Intel Cherryview and Baytrail: switch drivers to use raw spinlocks
     in IRQ handlers to play nice with the realtime patch set.

   - Rework and new modes handling for Qualcomm SPMI-MPP.

   - Pinconf power source config for SH PFC.

  New drivers and subdrivers:

   - A new driver for Conexant Digicolor CX92755.

   - A new driver for UniPhier PH1-LD4, PH1-Pro4, PH1-sLD8, PH1-Pro5,
     ProXtream2 and PH1-LD6b SoC pin control support.

   - Reverse-egineered the S/PDIF settings for the Allwinner sun4i
     driver.

   - Support for Qualcomm Technologies QDF2xxx ARM64 SoCs

   - A new Freescale i.mx6ul subdriver.

  Cleanup:

   - Remove platform data support in a number of SH PFC subdrivers"

* tag 'pinctrl-v4.3-1' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-pinctrl: (95 commits)
  pinctrl: at91: fix null pointer dereference
  pinctrl: mediatek: Implement wake handler and suspend resume
  pinctrl: mediatek: Fix multiple registration issue.
  pinctrl: sh-pfc: r8a7794: add USB pin groups
  pinctrl: at91: Use generic irq_{request,release}_resources()
  pinctrl: cherryview: Use raw_spinlock for locking
  pinctrl: baytrail: Use raw_spinlock for locking
  pinctrl: imx6ul: Remove .owner field
  pinctrl: zynq: Fix typos in smc0_nand_grp and smc0_nor_grp
  pinctrl: sh-pfc: Implement pinconf power-source param for voltage switching
  clk: rockchip: add pclk_pd_pmu to the list of rk3288 critical clocks
  pinctrl: sun4i: add spdif to pin description.
  pinctrl: atlas7: clear ugly branch statements for pull and drivestrength
  pinctrl: baytrail: Serialize all register access
  pinctrl: baytrail: Drop FSF mailing address
  pinctrl: rockchip: only enable gpio clock when it setting
  pinctrl/mediatek: fix spelling mistake in dev_err error message
  pinctrl: cherryview: Serialize all register access
  pinctrl: UniPhier: PH1-Pro5: add I2C ch6 pin-mux setting
  pinctrl: nomadik: reflect current input value
  ...
parents 8d2faea6 1ab36387
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+4 −0
Original line number Original line Diff line number Diff line
@@ -20,6 +20,10 @@ D: One of assisting postmasters for vger.kernel.org's lists
S: (ask for current address)
S: (ask for current address)
S: Finland
S: Finland


N: Thomas Abraham
E: thomas.ab@samsung.com
D: Samsung pin controller driver

N: Dragos Acostachioaie
N: Dragos Acostachioaie
E: dragos@iname.com
E: dragos@iname.com
W: http://www.arbornet.org/~dragos
W: http://www.arbornet.org/~dragos
+36 −1
Original line number Original line Diff line number Diff line
@@ -48,7 +48,7 @@ Optional subnode-properties:


Examples:
Examples:


pinctrl@01c20800 {
pio: pinctrl@01c20800 {
	compatible = "allwinner,sun5i-a13-pinctrl";
	compatible = "allwinner,sun5i-a13-pinctrl";
	reg = <0x01c20800 0x400>;
	reg = <0x01c20800 0x400>;
	#address-cells = <1>;
	#address-cells = <1>;
@@ -68,3 +68,38 @@ pinctrl@01c20800 {
		allwinner,pull = <0>;
		allwinner,pull = <0>;
	};
	};
};
};


GPIO and interrupt controller
-----------------------------

This hardware also acts as a GPIO controller and an interrupt
controller.

Consumers that would want to refer to one or the other (or both)
should provide through the usual *-gpios and interrupts properties a
cell with 3 arguments, first the number of the bank, then the pin
inside that bank, and finally the flags for the GPIO/interrupts.

Example:

xio: gpio@38 {
	compatible = "nxp,pcf8574a";
	reg = <0x38>;

	gpio-controller;
	#gpio-cells = <2>;

	interrupt-parent = <&pio>;
	interrupts = <6 0 IRQ_TYPE_EDGE_FALLING>;
	interrupt-controller;
	#interrupt-cells = <2>;
};

reg_usb1_vbus: usb1-vbus {
	compatible = "regulator-fixed";
	regulator-name = "usb1-vbus";
	regulator-min-microvolt = <5000000>;
	regulator-max-microvolt = <5000000>;
	gpio = <&pio 7 6 GPIO_ACTIVE_HIGH>;
};
+86 −0
Original line number Original line Diff line number Diff line
Conexant Digicolor CX92755 General Purpose Pin Mapping

This document describes the device tree binding of the pin mapping hardware
modules in the Conexant Digicolor CX92755 SoCs. The CX92755 in one of the
Digicolor series of SoCs.

=== Pin Controller Node ===

Required Properties:

- compatible: Must be "cnxt,cx92755-pinctrl"
- reg: Base address of the General Purpose Pin Mapping register block and the
  size of the block.
- gpio-controller: Marks the device node as a GPIO controller.
- #gpio-cells: Must be <2>. The first cell is the pin number and the
  second cell is used to specify flags. See include/dt-bindings/gpio/gpio.h
  for possible values.

For example, the following is the bare minimum node:

	pinctrl: pinctrl@f0000e20 {
		compatible = "cnxt,cx92755-pinctrl";
		reg = <0xf0000e20 0x100>;
		gpio-controller;
		#gpio-cells = <2>;
	};

As a pin controller device, in addition to the required properties, this node
should also contain the pin configuration nodes that client devices reference,
if any.

For a general description of GPIO bindings, please refer to ../gpio/gpio.txt.

=== Pin Configuration Node ===

Each pin configuration node is a sub-node of the pin controller node and is a
container of an arbitrary number of subnodes, called pin group nodes in this
document.

Please refer to the pinctrl-bindings.txt in this directory for details of the
common pinctrl bindings used by client devices, including the definition of a
"pin configuration node".

=== Pin Group Node ===

A pin group node specifies the desired pin mux for an arbitrary number of
pins. The name of the pin group node is optional and not used.

A pin group node only affects the properties specified in the node, and has no
effect on any properties that are omitted.

The pin group node accepts a subset of the generic pin config properties. For
details generic pin config properties, please refer to pinctrl-bindings.txt
and <include/linux/pinctrl/pinconfig-generic.h>.

Required Pin Group Node Properties:

- pins: Multiple strings. Specifies the name(s) of one or more pins to be
  configured by this node. The format of a pin name string is "GP_xy", where x
  is an uppercase character from 'A' to 'R', and y is a digit from 0 to 7.
- function: String. Specifies the pin mux selection. Values must be one of:
  "gpio", "client_a", "client_b", "client_c"

Example:
	pinctrl: pinctrl@f0000e20 {
		compatible = "cnxt,cx92755-pinctrl";
		reg = <0xf0000e20 0x100>;

		uart0_default: uart0_active {
			data_signals {
				pins = "GP_O0", "GP_O1";
				function = "client_b";
			};
		};
	};

	uart0: uart@f0000740 {
		compatible = "cnxt,cx92755-usart";
		...
		pinctrl-0 = <&uart0_default>;
		pinctrl-names = "default";
	};

In the example above, a single pin group configuration node defines the
"client select" for the Rx and Tx signals of uart0. The uart0 node references
that pin configuration node using the &uart0_default phandle.
+24 −12
Original line number Original line Diff line number Diff line
@@ -7,8 +7,13 @@ of PMIC's from Qualcomm.
	Usage: required
	Usage: required
	Value type: <string>
	Value type: <string>
	Definition: Should contain one of:
	Definition: Should contain one of:
		    "qcom,pm8018-mpp",
		    "qcom,pm8038-mpp",
		    "qcom,pm8821-mpp",
		    "qcom,pm8841-mpp",
		    "qcom,pm8841-mpp",
		    "qcom,pm8916-mpp",
		    "qcom,pm8916-mpp",
		    "qcom,pm8917-mpp",
		    "qcom,pm8921-mpp",
		    "qcom,pm8941-mpp",
		    "qcom,pm8941-mpp",
		    "qcom,pma8084-mpp",
		    "qcom,pma8084-mpp",


@@ -77,12 +82,9 @@ to specify in a pin configuration subnode:
	Value type: <string>
	Value type: <string>
	Definition: Specify the alternative function to be configured for the
	Definition: Specify the alternative function to be configured for the
		    specified pins.  Valid values are:
		    specified pins.  Valid values are:
		    "normal",
		    "digital",
		    "paired",
		    "analog",
		    "dtest1",
		    "sink"
		    "dtest2",
		    "dtest3",
		    "dtest4"


- bias-disable:
- bias-disable:
	Usage: optional
	Usage: optional
@@ -127,12 +129,18 @@ to specify in a pin configuration subnode:
	Definition: Selects the power source for the specified pins. Valid power
	Definition: Selects the power source for the specified pins. Valid power
		    sources are defined in <dt-bindings/pinctrl/qcom,pmic-mpp.h>
		    sources are defined in <dt-bindings/pinctrl/qcom,pmic-mpp.h>


- qcom,analog-mode:
- qcom,analog-level:
	Usage: optional
	Usage: optional
	Value type: <none>
	Value type: <u32>
	Definition: Selects Analog mode of operation: combined with input-enable
	Definition: Selects the source for analog output. Valued values are
		    and/or output-high, output-low MPP could operate as
		    defined in <dt-binding/pinctrl/qcom,pmic-mpp.h>
		    Bidirectional Logic, Analog Input, Analog Output.
		    PMIC_MPP_AOUT_LVL_*

- qcom,dtest:
	Usage: optional
	Value type: <u32>
	Definition: Selects which dtest rail to be routed in the various functions.
		    Valid values are 1-4


- qcom,amux-route:
- qcom,amux-route:
	Usage: optional
	Usage: optional
@@ -140,6 +148,10 @@ to specify in a pin configuration subnode:
	Definition: Selects the source for analog input. Valid values are
	Definition: Selects the source for analog input. Valid values are
		    defined in <dt-bindings/pinctrl/qcom,pmic-mpp.h>
		    defined in <dt-bindings/pinctrl/qcom,pmic-mpp.h>
		    PMIC_MPP_AMUX_ROUTE_CH5, PMIC_MPP_AMUX_ROUTE_CH6...
		    PMIC_MPP_AMUX_ROUTE_CH5, PMIC_MPP_AMUX_ROUTE_CH6...
- qcom,paired:
	Usage: optional
	Value type: <none>
	Definition: Indicates that the pin should be operating in paired mode.


Example:
Example:


@@ -156,7 +168,7 @@ Example:
		pm8841_default: default {
		pm8841_default: default {
			gpio {
			gpio {
				pins = "mpp1", "mpp2", "mpp3", "mpp4";
				pins = "mpp1", "mpp2", "mpp3", "mpp4";
				function = "normal";
				function = "digital";
				input-enable;
				input-enable;
				power-source = <PM8841_MPP_S3>;
				power-source = <PM8841_MPP_S3>;
			};
			};
+13 −11
Original line number Original line Diff line number Diff line
@@ -58,12 +58,12 @@ are parsed through phandles and processed purely based on their content.


Pin Configuration Node Properties:
Pin Configuration Node Properties:


- renesas,pins : An array of strings, each string containing the name of a pin.
- pins : An array of strings, each string containing the name of a pin.
- renesas,groups : An array of strings, each string containing the name of a pin
- groups : An array of strings, each string containing the name of a pin
  group.
  group.


- renesas,function: A string containing the name of the function to mux to the
- function: A string containing the name of the function to mux to the pin
  pin group(s) specified by the renesas,groups property
  group(s) specified by the groups property.


  Valid values for pin, group and function names can be found in the group and
  Valid values for pin, group and function names can be found in the group and
  function arrays of the PFC data file corresponding to the SoC
  function arrays of the PFC data file corresponding to the SoC
@@ -71,7 +71,9 @@ Pin Configuration Node Properties:


The pin configuration parameters use the generic pinconf bindings defined in
The pin configuration parameters use the generic pinconf bindings defined in
pinctrl-bindings.txt in this directory. The supported parameters are
pinctrl-bindings.txt in this directory. The supported parameters are
bias-disable, bias-pull-up and bias-pull-down.
bias-disable, bias-pull-up, bias-pull-down and power-source. For pins that
have a configurable I/O voltage, the power-source value should be the
nominal I/O voltage in millivolts.




GPIO
GPIO
@@ -141,19 +143,19 @@ Example 3: KZM-A9-GT (SH-Mobile AG5) default pin state hog and pin control maps


		mmcif_pins: mmcif {
		mmcif_pins: mmcif {
			mux {
			mux {
				renesas,groups = "mmc0_data8_0", "mmc0_ctrl_0";
				groups = "mmc0_data8_0", "mmc0_ctrl_0";
				renesas,function = "mmc0";
				function = "mmc0";
			};
			};
			cfg {
			cfg {
				renesas,groups = "mmc0_data8_0";
				groups = "mmc0_data8_0";
				renesas,pins = "PORT279";
				pins = "PORT279";
				bias-pull-up;
				bias-pull-up;
			};
			};
		};
		};


		scifa4_pins: scifa4 {
		scifa4_pins: scifa4 {
			renesas,groups = "scifa4_data", "scifa4_ctrl";
			groups = "scifa4_data", "scifa4_ctrl";
			renesas,function = "scifa4";
			function = "scifa4";
		};
		};
	};
	};


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