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Commit 88a97f0b authored by Shaohua Li's avatar Shaohua Li Committed by Avi Kivity
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KVM: MMU: Fix Wrong tlb flush order 



Need to flush the tlb after updating a pte, not before.

Signed-off-by: default avatarShaohua Li <shaohua.li@intel.com>
Signed-off-by: default avatarAvi Kivity <avi@qumranet.com>
parent 75880a01

drivers/kvm/mmu.c

+1 −1
Original line number Original line Diff line number Diff line
@@ -441,8 +441,8 @@ static void rmap_write_protect(struct kvm_vcpu *vcpu, u64 gfn) 
		BUG_ON(!(*spte & PT_WRITABLE_MASK));

		BUG_ON(!(*spte & PT_WRITABLE_MASK));

		rmap_printk("rmap_write_protect: spte %p %llx\n", spte, *spte);

		rmap_printk("rmap_write_protect: spte %p %llx\n", spte, *spte);

		rmap_remove(vcpu, spte);

		rmap_remove(vcpu, spte);

		kvm_flush_remote_tlbs(vcpu->kvm);

		set_shadow_pte(spte, *spte & ~PT_WRITABLE_MASK);

		set_shadow_pte(spte, *spte & ~PT_WRITABLE_MASK);

		kvm_flush_remote_tlbs(vcpu->kvm);

	}

	}

}

}