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Commit 885d6626 authored by Hans de Goede's avatar Hans de Goede Committed by Linus Walleij
Browse files

pinctrl-sunxi: Fix sun5i-a13 port F multiplexing 

The correct value for selecting the mmc0 function on port F pins is 2 not 4,
as per the data-sheet:
http://dl.linux-sunxi.org/A13/A13%20Datasheet%20-%20v1.12%20%282012-03-29%29.pdf



Signed-off-by: default avatarHans de Goede <hdegoede@redhat.com>
Acked-by: default avatarMaxime Ripard <maxime.ripard@free-electrons.com>
Signed-off-by: default avatarLinus Walleij <linus.walleij@linaro.org>
parent e3653749

drivers/pinctrl/pinctrl-sunxi-pins.h

+6 −6
Original line number Original line Diff line number Diff line
@@ -1932,27 +1932,27 @@ static const struct sunxi_desc_pin sun5i_a13_pins[] = { 
	SUNXI_PIN(SUNXI_PINCTRL_PIN_PF0,

	SUNXI_PIN(SUNXI_PINCTRL_PIN_PF0,

		  SUNXI_FUNCTION(0x0, "gpio_in"),

		  SUNXI_FUNCTION(0x0, "gpio_in"),

		  SUNXI_FUNCTION(0x1, "gpio_out"),

		  SUNXI_FUNCTION(0x1, "gpio_out"),

		  SUNXI_FUNCTION(0x4, "mmc0")),		/* D1 */

		  SUNXI_FUNCTION(0x2, "mmc0")),		/* D1 */

	SUNXI_PIN(SUNXI_PINCTRL_PIN_PF1,

	SUNXI_PIN(SUNXI_PINCTRL_PIN_PF1,

		  SUNXI_FUNCTION(0x0, "gpio_in"),

		  SUNXI_FUNCTION(0x0, "gpio_in"),

		  SUNXI_FUNCTION(0x1, "gpio_out"),

		  SUNXI_FUNCTION(0x1, "gpio_out"),

		  SUNXI_FUNCTION(0x4, "mmc0")),		/* D0 */

		  SUNXI_FUNCTION(0x2, "mmc0")),		/* D0 */

	SUNXI_PIN(SUNXI_PINCTRL_PIN_PF2,

	SUNXI_PIN(SUNXI_PINCTRL_PIN_PF2,

		  SUNXI_FUNCTION(0x0, "gpio_in"),

		  SUNXI_FUNCTION(0x0, "gpio_in"),

		  SUNXI_FUNCTION(0x1, "gpio_out"),

		  SUNXI_FUNCTION(0x1, "gpio_out"),

		  SUNXI_FUNCTION(0x4, "mmc0")),		/* CLK */

		  SUNXI_FUNCTION(0x2, "mmc0")),		/* CLK */

	SUNXI_PIN(SUNXI_PINCTRL_PIN_PF3,

	SUNXI_PIN(SUNXI_PINCTRL_PIN_PF3,

		  SUNXI_FUNCTION(0x0, "gpio_in"),

		  SUNXI_FUNCTION(0x0, "gpio_in"),

		  SUNXI_FUNCTION(0x1, "gpio_out"),

		  SUNXI_FUNCTION(0x1, "gpio_out"),

		  SUNXI_FUNCTION(0x4, "mmc0")),		/* CMD */

		  SUNXI_FUNCTION(0x2, "mmc0")),		/* CMD */

	SUNXI_PIN(SUNXI_PINCTRL_PIN_PF4,

	SUNXI_PIN(SUNXI_PINCTRL_PIN_PF4,

		  SUNXI_FUNCTION(0x0, "gpio_in"),

		  SUNXI_FUNCTION(0x0, "gpio_in"),

		  SUNXI_FUNCTION(0x1, "gpio_out"),

		  SUNXI_FUNCTION(0x1, "gpio_out"),

		  SUNXI_FUNCTION(0x4, "mmc0")),		/* D3 */

		  SUNXI_FUNCTION(0x2, "mmc0")),		/* D3 */

	SUNXI_PIN(SUNXI_PINCTRL_PIN_PF5,

	SUNXI_PIN(SUNXI_PINCTRL_PIN_PF5,

		  SUNXI_FUNCTION(0x0, "gpio_in"),

		  SUNXI_FUNCTION(0x0, "gpio_in"),

		  SUNXI_FUNCTION(0x1, "gpio_out"),

		  SUNXI_FUNCTION(0x1, "gpio_out"),

		  SUNXI_FUNCTION(0x4, "mmc0")),		/* D2 */

		  SUNXI_FUNCTION(0x2, "mmc0")),		/* D2 */

	/* Hole */

	/* Hole */

	SUNXI_PIN(SUNXI_PINCTRL_PIN_PG0,

	SUNXI_PIN(SUNXI_PINCTRL_PIN_PG0,

		  SUNXI_FUNCTION(0x0, "gpio_in"),

		  SUNXI_FUNCTION(0x0, "gpio_in"),