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Commit 88401702 authored by Kuninori Morimoto's avatar Kuninori Morimoto Committed by Simon Horman
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ARM: shmobile: r8a7791: Add Audio CTU support on DTSI

parent fc67bf42
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+16 −0
Original line number Diff line number Diff line
@@ -1311,6 +1311,7 @@
				<&mstp10_clks R8A7791_CLK_SCU_ALL>, <&mstp10_clks R8A7791_CLK_SCU_ALL>,
				<&mstp10_clks R8A7791_CLK_SCU_ALL>, <&mstp10_clks R8A7791_CLK_SCU_ALL>,
				<&mstp10_clks R8A7791_CLK_SCU_ALL>, <&mstp10_clks R8A7791_CLK_SCU_ALL>,
				<&mstp10_clks R8A7791_CLK_SCU_ALL>, <&mstp10_clks R8A7791_CLK_SCU_ALL>,
				<&mstp10_clks R8A7791_CLK_SCU_ALL>, <&mstp10_clks R8A7791_CLK_SCU_ALL>;

			#clock-cells = <1>;
@@ -1320,6 +1321,7 @@
				R8A7791_CLK_SSI4 R8A7791_CLK_SSI3 R8A7791_CLK_SSI2 R8A7791_CLK_SSI1 R8A7791_CLK_SSI0
				R8A7791_CLK_SCU_ALL
				R8A7791_CLK_SCU_DVC1 R8A7791_CLK_SCU_DVC0
				R8A7791_CLK_SCU_CTU1_MIX1 R8A7791_CLK_SCU_CTU0_MIX0
				R8A7791_CLK_SCU_SRC9 R8A7791_CLK_SCU_SRC8 R8A7791_CLK_SCU_SRC7 R8A7791_CLK_SCU_SRC6 R8A7791_CLK_SCU_SRC5
				R8A7791_CLK_SCU_SRC4 R8A7791_CLK_SCU_SRC3 R8A7791_CLK_SCU_SRC2 R8A7791_CLK_SCU_SRC1 R8A7791_CLK_SCU_SRC0
			>;
@@ -1329,6 +1331,7 @@
				"ssi4", "ssi3", "ssi2", "ssi1", "ssi0",
				"scu-all",
				"scu-dvc1", "scu-dvc0",
				"scu-ctu1-mix1", "scu-ctu0-mix0",
				"scu-src9", "scu-src8", "scu-src7", "scu-src6", "scu-src5",
				"scu-src4", "scu-src3", "scu-src2", "scu-src1", "scu-src0";
		};
@@ -1582,6 +1585,7 @@
			<&mstp10_clks R8A7791_CLK_SCU_SRC5>, <&mstp10_clks R8A7791_CLK_SCU_SRC4>,
			<&mstp10_clks R8A7791_CLK_SCU_SRC3>, <&mstp10_clks R8A7791_CLK_SCU_SRC2>,
			<&mstp10_clks R8A7791_CLK_SCU_SRC1>, <&mstp10_clks R8A7791_CLK_SCU_SRC0>,
			<&mstp10_clks R8A7791_CLK_SCU_CTU0_MIX0>, <&mstp10_clks R8A7791_CLK_SCU_CTU1_MIX1>,
			<&mstp10_clks R8A7791_CLK_SCU_DVC0>, <&mstp10_clks R8A7791_CLK_SCU_DVC1>,
			<&audio_clk_a>, <&audio_clk_b>, <&audio_clk_c>, <&m2_clk>;
		clock-names = "ssi-all",
@@ -1589,6 +1593,7 @@
				"ssi.4", "ssi.3", "ssi.2", "ssi.1", "ssi.0",
				"src.9", "src.8", "src.7", "src.6", "src.5",
				"src.4", "src.3", "src.2", "src.1", "src.0",
				"ctu.0", "ctu.1",
				"dvc.0", "dvc.1",
				"clk_a", "clk_b", "clk_c", "clk_i";

@@ -1605,6 +1610,17 @@
			};
		};

		rcar_sound,ctu {
			ctu00: ctu@0 { };
			ctu01: ctu@1 { };
			ctu02: ctu@2 { };
			ctu03: ctu@3 { };
			ctu10: ctu@4 { };
			ctu11: ctu@5 { };
			ctu12: ctu@6 { };
			ctu13: ctu@7 { };
		};

		rcar_sound,src {
			src0: src@0 {
				interrupts = <0 352 IRQ_TYPE_LEVEL_HIGH>;
+2 −0
Original line number Diff line number Diff line
@@ -141,6 +141,8 @@
#define R8A7791_CLK_SCU_ALL		17
#define R8A7791_CLK_SCU_DVC1		18
#define R8A7791_CLK_SCU_DVC0		19
#define R8A7791_CLK_SCU_CTU1_MIX1	20
#define R8A7791_CLK_SCU_CTU0_MIX0	21
#define R8A7791_CLK_SCU_SRC9		22
#define R8A7791_CLK_SCU_SRC8		23
#define R8A7791_CLK_SCU_SRC7		24