Donate to e Foundation | Murena handsets with /e/OS | Own a part of Murena! Learn more

Commit 8829009d authored by Usha Ketineni's avatar Usha Ketineni Committed by Jeff Kirsher
Browse files

ixgbe: Disable DCB and FCoE for X550EM_x and x550em_a 



This patch adds IXGBE_FLAG_DCB_CAPABLE flag that is set
for all MACs other than X550EM_x and x550em_a. DCB and
FCoE is disabled for these MACS. DCB initialization
code is moved to a separate function.

Signed-off-by: default avatarUsha Ketineni <usha.k.ketineni@intel.com>
Tested-by: default avatarRonald Bynoe <ronald.j.bynoe@intel.com>
Signed-off-by: default avatarJeff Kirsher <jeffrey.t.kirsher@intel.com>
parent 2f8214fe

drivers/net/ethernet/intel/ixgbe/ixgbe.h

+1 −0
Original line number Diff line number Diff line
@@ -644,6 +644,7 @@ struct ixgbe_adapter { 
#define IXGBE_FLAG_VXLAN_OFFLOAD_CAPABLE	BIT(24)

#define IXGBE_FLAG_RX_HWTSTAMP_ENABLED		BIT(25)

#define IXGBE_FLAG_RX_HWTSTAMP_IN_REGISTER	BIT(26)

#define IXGBE_FLAG_DCB_CAPABLE			BIT(27)



	u32 flags2;

#define IXGBE_FLAG2_RSC_CAPABLE			BIT(0)

drivers/net/ethernet/intel/ixgbe/ixgbe_main.c

+69 −42
Original line number Diff line number Diff line
@@ -5559,6 +5559,58 @@ static void ixgbe_tx_timeout(struct net_device *netdev) 
	ixgbe_tx_timeout_reset(adapter);

}



#ifdef CONFIG_IXGBE_DCB

static void ixgbe_init_dcb(struct ixgbe_adapter *adapter)

{

	struct ixgbe_hw *hw = &adapter->hw;

	struct tc_configuration *tc;

	int j;



	switch (hw->mac.type) {

	case ixgbe_mac_82598EB:

	case ixgbe_mac_82599EB:

		adapter->dcb_cfg.num_tcs.pg_tcs = MAX_TRAFFIC_CLASS;

		adapter->dcb_cfg.num_tcs.pfc_tcs = MAX_TRAFFIC_CLASS;

		break;

	case ixgbe_mac_X540:

	case ixgbe_mac_X550:

		adapter->dcb_cfg.num_tcs.pg_tcs = X540_TRAFFIC_CLASS;

		adapter->dcb_cfg.num_tcs.pfc_tcs = X540_TRAFFIC_CLASS;

		break;

	case ixgbe_mac_X550EM_x:

	case ixgbe_mac_x550em_a:

	default:

		adapter->dcb_cfg.num_tcs.pg_tcs = DEF_TRAFFIC_CLASS;

		adapter->dcb_cfg.num_tcs.pfc_tcs = DEF_TRAFFIC_CLASS;

		break;

	}



	/* Configure DCB traffic classes */

	for (j = 0; j < MAX_TRAFFIC_CLASS; j++) {

		tc = &adapter->dcb_cfg.tc_config[j];

		tc->path[DCB_TX_CONFIG].bwg_id = 0;

		tc->path[DCB_TX_CONFIG].bwg_percent = 12 + (j & 1);

		tc->path[DCB_RX_CONFIG].bwg_id = 0;

		tc->path[DCB_RX_CONFIG].bwg_percent = 12 + (j & 1);

		tc->dcb_pfc = pfc_disabled;

	}



	/* Initialize default user to priority mapping, UPx->TC0 */

	tc = &adapter->dcb_cfg.tc_config[0];

	tc->path[DCB_TX_CONFIG].up_to_tc_bitmap = 0xFF;

	tc->path[DCB_RX_CONFIG].up_to_tc_bitmap = 0xFF;



	adapter->dcb_cfg.bw_percentage[DCB_TX_CONFIG][0] = 100;

	adapter->dcb_cfg.bw_percentage[DCB_RX_CONFIG][0] = 100;

	adapter->dcb_cfg.pfc_mode_enable = false;

	adapter->dcb_set_bitmap = 0x00;

	if (adapter->flags & IXGBE_FLAG_DCB_CAPABLE)

		adapter->dcbx_cap = DCB_CAP_DCBX_HOST | DCB_CAP_DCBX_VER_CEE;

	memcpy(&adapter->temp_dcb_cfg, &adapter->dcb_cfg,

	       sizeof(adapter->temp_dcb_cfg));

}

#endif



/**

 * ixgbe_sw_init - Initialize general software structures (struct ixgbe_adapter)

 * @adapter: board private structure to initialize
@@ -5575,10 +5627,6 @@ static int ixgbe_sw_init(struct ixgbe_adapter *adapter) 
	u32 fwsm;

	u16 device_caps;

	int i;

#ifdef CONFIG_IXGBE_DCB

	int j;

	struct tc_configuration *tc;

#endif



	/* PCI config space info */
@@ -5600,6 +5648,10 @@ static int ixgbe_sw_init(struct ixgbe_adapter *adapter) 
#ifdef CONFIG_IXGBE_DCA

	adapter->flags |= IXGBE_FLAG_DCA_CAPABLE;

#endif

#ifdef CONFIG_IXGBE_DCB

	adapter->flags |= IXGBE_FLAG_DCB_CAPABLE;

	adapter->flags &= ~IXGBE_FLAG_DCB_ENABLED;

#endif

#ifdef IXGBE_FCOE

	adapter->flags |= IXGBE_FLAG_FCOE_CAPABLE;

	adapter->flags &= ~IXGBE_FLAG_FCOE_ENABLED;
@@ -5656,6 +5708,16 @@ static int ixgbe_sw_init(struct ixgbe_adapter *adapter) 
		break;

	case ixgbe_mac_X550EM_x:

	case ixgbe_mac_x550em_a:

#ifdef CONFIG_IXGBE_DCB

		adapter->flags &= ~IXGBE_FLAG_DCB_CAPABLE;

#endif

#ifdef IXGBE_FCOE

		adapter->flags &= ~IXGBE_FLAG_FCOE_CAPABLE;

#ifdef CONFIG_IXGBE_DCB

		adapter->fcoe.up = 0;

#endif /* IXGBE_DCB */

#endif /* IXGBE_FCOE */

	/* Fall Through */

	case ixgbe_mac_X550:

#ifdef CONFIG_IXGBE_DCA

		adapter->flags &= ~IXGBE_FLAG_DCA_CAPABLE;
@@ -5677,43 +5739,7 @@ static int ixgbe_sw_init(struct ixgbe_adapter *adapter) 
	spin_lock_init(&adapter->fdir_perfect_lock);



#ifdef CONFIG_IXGBE_DCB

	switch (hw->mac.type) {

	case ixgbe_mac_X540:

	case ixgbe_mac_X550:

	case ixgbe_mac_X550EM_x:

	case ixgbe_mac_x550em_a:

		adapter->dcb_cfg.num_tcs.pg_tcs = X540_TRAFFIC_CLASS;

		adapter->dcb_cfg.num_tcs.pfc_tcs = X540_TRAFFIC_CLASS;

		break;

	default:

		adapter->dcb_cfg.num_tcs.pg_tcs = MAX_TRAFFIC_CLASS;

		adapter->dcb_cfg.num_tcs.pfc_tcs = MAX_TRAFFIC_CLASS;

		break;

	}



	/* Configure DCB traffic classes */

	for (j = 0; j < MAX_TRAFFIC_CLASS; j++) {

		tc = &adapter->dcb_cfg.tc_config[j];

		tc->path[DCB_TX_CONFIG].bwg_id = 0;

		tc->path[DCB_TX_CONFIG].bwg_percent = 12 + (j & 1);

		tc->path[DCB_RX_CONFIG].bwg_id = 0;

		tc->path[DCB_RX_CONFIG].bwg_percent = 12 + (j & 1);

		tc->dcb_pfc = pfc_disabled;

	}



	/* Initialize default user to priority mapping, UPx->TC0 */

	tc = &adapter->dcb_cfg.tc_config[0];

	tc->path[DCB_TX_CONFIG].up_to_tc_bitmap = 0xFF;

	tc->path[DCB_RX_CONFIG].up_to_tc_bitmap = 0xFF;



	adapter->dcb_cfg.bw_percentage[DCB_TX_CONFIG][0] = 100;

	adapter->dcb_cfg.bw_percentage[DCB_RX_CONFIG][0] = 100;

	adapter->dcb_cfg.pfc_mode_enable = false;

	adapter->dcb_set_bitmap = 0x00;

	adapter->dcbx_cap = DCB_CAP_DCBX_HOST | DCB_CAP_DCBX_VER_CEE;

	memcpy(&adapter->temp_dcb_cfg, &adapter->dcb_cfg,

	       sizeof(adapter->temp_dcb_cfg));



	ixgbe_init_dcb(adapter);

#endif



	/* default flow control settings */
@@ -9495,6 +9521,7 @@ static int ixgbe_probe(struct pci_dev *pdev, const struct pci_device_id *ent) 
	netdev->priv_flags |= IFF_SUPP_NOFCS;



#ifdef CONFIG_IXGBE_DCB

	if (adapter->flags & IXGBE_FLAG_DCB_CAPABLE)

		netdev->dcbnl_ops = &dcbnl_ops;

#endif

drivers/net/ethernet/intel/ixgbe/ixgbe_type.h

+1 −0
Original line number Diff line number Diff line
@@ -548,6 +548,7 @@ struct ixgbe_thermal_sensor_data { 
/* DCB registers */

#define MAX_TRAFFIC_CLASS        8

#define X540_TRAFFIC_CLASS       4

#define DEF_TRAFFIC_CLASS        1

#define IXGBE_RMCS      0x03D00

#define IXGBE_DPMCS     0x07F40

#define IXGBE_PDPMCS    0x0CD00