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Commit 86f28d76 authored by Xiubo Li's avatar Xiubo Li Committed by Mark Brown
Browse files

ASoC: fsl-spdif: big-endian support 



For most platforms, the CPU and SPDIF device is in the same endianess
mode. While for the LS1 platform, the CPU is in LE mode and the SPDIF
is in BE mode.

Signed-off-by: default avatarXiubo Li <Li.Xiubo@freescale.com>
Acked-by: default avatarNicolin Chen <Guangyu.Chen@freescale.com>
Signed-off-by: default avatarMark Brown <broonie@linaro.org>
parent 38dbfb59

Documentation/devicetree/bindings/sound/fsl,spdif.txt

+5 −0
Original line number Diff line number Diff line
@@ -29,6 +29,10 @@ Required properties: 
			can also be referred to TxClk_Source

			bit of register SPDIF_STC.



   - big-endian : If this property is absent, the native endian mode will

   be in use as default, or the big endian mode will be in use for all the

   device registers.



Example:



spdif: spdif@02004000 {
@@ -50,5 +54,6 @@ spdif: spdif@02004000 { 
		"rxtx5", "rxtx6",

		"rxtx7";



	big-endian;

	status = "okay";

};

sound/soc/fsl/fsl_spdif.c

+4 −1
Original line number Diff line number Diff line
@@ -985,7 +985,7 @@ static bool fsl_spdif_writeable_reg(struct device *dev, unsigned int reg) 
	}

}



static const struct regmap_config fsl_spdif_regmap_config = {

static struct regmap_config fsl_spdif_regmap_config = {

	.reg_bits = 32,

	.reg_stride = 4,

	.val_bits = 32,
@@ -1105,6 +1105,9 @@ static int fsl_spdif_probe(struct platform_device *pdev) 
	memcpy(&spdif_priv->cpu_dai_drv, &fsl_spdif_dai, sizeof(fsl_spdif_dai));

	spdif_priv->cpu_dai_drv.name = spdif_priv->name;



	if (of_property_read_bool(np, "big-endian"))

		fsl_spdif_regmap_config.val_format_endian = REGMAP_ENDIAN_BIG;



	/* Get the addresses and IRQ */

	res = platform_get_resource(pdev, IORESOURCE_MEM, 0);

	regs = devm_ioremap_resource(&pdev->dev, res);