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Commit 86a2100a authored by Matt Roper's avatar Matt Roper
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drm/i915/gen9: Store plane minimum blocks in CRTC wm state (v2) 



This will eventually allow us to re-use old values without
re-calculating them for unchanged planes (which also helps us avoid
re-grabbing extra plane states).

v2:
 -  Drop unnecessary memset's; they were meant for a later patch (which
    got reworked anyway to not need them, but were mis-rebased into this
    one.  (Maarten)

Cc: Maarten Lankhorst <maarten.lankhorst@linux.intel.com>
Signed-off-by: default avatarMatt Roper <matthew.d.roper@intel.com>
Reviewed-by: default avatarMaarten Lankhorst <maarten.lankhorst@linux.intel.com>
Link: http://patchwork.freedesktop.org/patch/msgid/1463061971-19638-6-git-send-email-matthew.d.roper@intel.com
parent 9c74d826

drivers/gpu/drm/i915/intel_drv.h

+4 −0
Original line number Diff line number Diff line
@@ -431,6 +431,10 @@ struct intel_crtc_wm_state { 
			/* cached plane data rate */

			unsigned plane_data_rate[I915_MAX_PLANES];

			unsigned plane_y_data_rate[I915_MAX_PLANES];



			/* minimum block allocation */

			uint16_t minimum_blocks[I915_MAX_PLANES];

			uint16_t minimum_y_blocks[I915_MAX_PLANES];

		} skl;

	};

drivers/gpu/drm/i915/intel_pm.c

+2 −2
Original line number Diff line number Diff line
@@ -3067,8 +3067,8 @@ skl_allocate_pipe_ddb(struct intel_crtc_state *cstate, 
	enum pipe pipe = intel_crtc->pipe;

	struct skl_ddb_entry *alloc = &ddb->pipe[pipe];

	uint16_t alloc_size, start, cursor_blocks;

	uint16_t minimum[I915_MAX_PLANES];

	uint16_t y_minimum[I915_MAX_PLANES];

	uint16_t *minimum = cstate->wm.skl.minimum_blocks;

	uint16_t *y_minimum = cstate->wm.skl.minimum_y_blocks;

	unsigned int total_data_rate;



	skl_ddb_get_pipe_allocation_limits(dev, cstate, config, alloc);