Merge 3.16-rc5 into usb-next (85bf20d1) · Commits · e / devices / android_kernel_teracube_2e

Documentation/Changes

+3 −6

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		@@ -280,12 +280,9 @@ that is possible.
		mcelog
		------

		In Linux 2.6.31+ the i386 kernel needs to run the mcelog utility
		as a regular cronjob similar to the x86-64 kernel to process and log
		machine check events when CONFIG_X86_NEW_MCE is enabled. Machine check
		events are errors reported by the CPU. Processing them is strongly encouraged.
		All x86-64 kernels since 2.6.4 require the mcelog utility to
		process machine checks.
		On x86 kernels the mcelog utility is needed to process and log machine check
		events when CONFIG_X86_MCE is enabled. Machine check events are errors reported
		by the CPU. Processing them is strongly encouraged.

		Getting updated software
		========================

+1 −1

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		@@ -708,7 +708,7 @@ hardware level details could be very different.

		<para>Systems need specialized hardware support to implement OTG,
		notably including a special <emphasis>Mini-AB</emphasis> jack
		and associated transciever to support <emphasis>Dual-Role</emphasis>
		and associated transceiver to support <emphasis>Dual-Role</emphasis>
		operation:
		they can act either as a host, using the standard
		Linux-USB host side driver stack,

+2 −2

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		@@ -182,7 +182,7 @@
		<para>
		Each interrupt is described by an interrupt descriptor structure
		irq_desc. The interrupt is referenced by an 'unsigned int' numeric
		value which selects the corresponding interrupt decription structure
		value which selects the corresponding interrupt description structure
		in the descriptor structures array.
		The descriptor structure contains status information and pointers
		to the interrupt flow method and the interrupt chip structure
		@@ -470,7 +470,7 @@ if (desc->irq_data.chip->irq_eoi)
		<para>
		To avoid copies of identical implementations of IRQ chips the
		core provides a configurable generic interrupt chip
		implementation. Developers should check carefuly whether the
		implementation. Developers should check carefully whether the
		generic chip fits their needs before implementing the same
		functionality slightly differently themselves.
		</para>

+1 −1

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		@@ -1760,7 +1760,7 @@ as it would be on UP.
		</para>

		<para>
		There is a furthur optimization possible here: remember our original
		There is a further optimization possible here: remember our original
		cache code, where there were no reference counts and the caller simply
		held the lock whenever using the object? This is still possible: if
		you hold the lock, no one can delete the object, so you don't need to

+3 −3

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		@@ -677,7 +677,7 @@ and other resources, etc.

		<listitem>
		<para>
		ATA_QCFLAG_ACTIVE is clared from qc->flags.
		ATA_QCFLAG_ACTIVE is cleared from qc->flags.
		</para>
		</listitem>

		@@ -708,7 +708,7 @@ and other resources, etc.

		<listitem>
		<para>
		qc->waiting is claread & completed (in that order).
		qc->waiting is cleared & completed (in that order).
		</para>
		</listitem>

		@@ -1163,7 +1163,7 @@ and other resources, etc.

		<para>
		Once sense data is acquired, this type of errors can be
		handled similary to other SCSI errors. Note that sense data
		handled similarly to other SCSI errors. Note that sense data
		may indicate ATA bus error (e.g. Sense Key 04h HARDWARE ERROR
		&& ASC/ASCQ 47h/00h SCSI PARITY ERROR). In such
		cases, the error should be considered as an ATA bus error and