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Commit 8597a1ba authored by Ben Skeggs's avatar Ben Skeggs
Browse files

drm/nv50: fix SOR count for early chipsets 



Signed-off-by: default avatarBen Skeggs <bskeggs@redhat.com>
parent 1da26566

drivers/gpu/drm/nouveau/nouveau_reg.h

+2 −5
Original line number Diff line number Diff line
@@ -785,15 +785,12 @@ 
#define NV50_PDISPLAY_DAC_MODE_CTRL_C(i)                (0x00610b5c + (i) * 0x8)

#define NV50_PDISPLAY_SOR_MODE_CTRL_P(i)                (0x00610b70 + (i) * 0x8)

#define NV50_PDISPLAY_SOR_MODE_CTRL_C(i)                (0x00610b74 + (i) * 0x8)

#define NV50_PDISPLAY_EXT_MODE_CTRL_P(i)                (0x00610b80 + (i) * 0x8)

#define NV50_PDISPLAY_EXT_MODE_CTRL_C(i)                (0x00610b84 + (i) * 0x8)

#define NV50_PDISPLAY_DAC_MODE_CTRL2_P(i)               (0x00610bdc + (i) * 0x8)

#define NV50_PDISPLAY_DAC_MODE_CTRL2_C(i)               (0x00610be0 + (i) * 0x8)



#define NV90_PDISPLAY_SOR_MODE_CTRL_P(i)                (0x00610794 + (i) * 0x8)

#define NV90_PDISPLAY_SOR_MODE_CTRL_C(i)                (0x00610798 + (i) * 0x8)

#define NV90_PDISPLAY_DAC_MODE_CTRL_P(i)                (0x00610b58 + (i) * 0x8)

#define NV90_PDISPLAY_DAC_MODE_CTRL_C(i)                (0x00610b5c + (i) * 0x8)

#define NV90_PDISPLAY_DAC_MODE_CTRL2_P(i)               (0x00610b80 + (i) * 0x8)

#define NV90_PDISPLAY_DAC_MODE_CTRL2_C(i)               (0x00610b84 + (i) * 0x8)



#define NV50_PDISPLAY_CRTC_CLK                                       0x00614000

#define NV50_PDISPLAY_CRTC_CLK_CTRL1(i)                 ((i) * 0x800 + 0x614100)

drivers/gpu/drm/nouveau/nv50_display.c

+17 −4
Original line number Diff line number Diff line
@@ -33,6 +33,19 @@ 
#include "nouveau_ramht.h"

#include "drm_crtc_helper.h"



static inline int

nv50_sor_nr(struct drm_device *dev)

{

	struct drm_nouveau_private *dev_priv = dev->dev_private;



	if (dev_priv->chipset  < 0x90 ||

	    dev_priv->chipset == 0x92 ||

	    dev_priv->chipset == 0xa0)

		return 2;



	return 4;

}



static void

nv50_evo_channel_del(struct nouveau_channel **pchan)

{
@@ -233,11 +246,11 @@ nv50_display_init(struct drm_device *dev) 
		nv_wr32(dev, 0x006101d0 + (i * 0x04), val);

	}

	/* SOR */

	for (i = 0; i < 4; i++) {

	for (i = 0; i < nv50_sor_nr(dev); i++) {

		val = nv_rd32(dev, 0x0061c000 + (i * 0x800));

		nv_wr32(dev, 0x006101e0 + (i * 0x04), val);

	}

	/* Something not yet in use, tv-out maybe. */

	/* EXT */

	for (i = 0; i < 3; i++) {

		val = nv_rd32(dev, 0x0061e000 + (i * 0x800));

		nv_wr32(dev, 0x006101f0 + (i * 0x04), val);
@@ -716,7 +729,7 @@ nv50_display_unk10_handler(struct drm_device *dev) 
		or = i;

	}



	for (i = 0; type == OUTPUT_ANY && i < 4; i++) {

	for (i = 0; type == OUTPUT_ANY && i < nv50_sor_nr(dev); i++) {

		if (dev_priv->chipset  < 0x90 ||

		    dev_priv->chipset == 0x92 ||

		    dev_priv->chipset == 0xa0)
@@ -847,7 +860,7 @@ nv50_display_unk20_handler(struct drm_device *dev) 
		or = i;

	}



	for (i = 0; type == OUTPUT_ANY && i < 4; i++) {

	for (i = 0; type == OUTPUT_ANY && i < nv50_sor_nr(dev); i++) {

		if (dev_priv->chipset  < 0x90 ||

		    dev_priv->chipset == 0x92 ||

		    dev_priv->chipset == 0xa0)