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Commit 8525a235 authored by Shobhit Kumar's avatar Shobhit Kumar Committed by Jani Nikula
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drm/i915: vlv_prepare_pll is only needed in case of non DSI interfaces 



For MIPI, DSI PLL is configured separately in vlv_configure_dsi_pll
during the DSI enable sequence

Causing WARN dump otherwise in dpio_reads

v2: Add IS_CHERRYVIEW check as suggested by Ville

Signed-off-by: default avatarShobhit Kumar <shobhit.kumar@intel.com>
Reviewed-by: default avatarVille Syrjälä <ville.syrjala@linux.intel.com>
Signed-off-by: default avatarJani Nikula <jani.nikula@intel.com>
parent 5b5ffff0

drivers/gpu/drm/i915/intel_display.c

+4 −3
Original line number Diff line number Diff line
@@ -4564,6 +4564,9 @@ static void valleyview_crtc_enable(struct drm_crtc *crtc) 
	if (intel_crtc->active)

		return;



	is_dsi = intel_pipe_has_type(crtc, INTEL_OUTPUT_DSI);



	if (!is_dsi && !IS_CHERRYVIEW(dev))

		vlv_prepare_pll(intel_crtc);



	/* Set up the display plane register */
@@ -4598,8 +4601,6 @@ static void valleyview_crtc_enable(struct drm_crtc *crtc) 
		if (encoder->pre_pll_enable)

			encoder->pre_pll_enable(encoder);



	is_dsi = intel_pipe_has_type(crtc, INTEL_OUTPUT_DSI);



	if (!is_dsi) {

		if (IS_CHERRYVIEW(dev))

			chv_enable_pll(intel_crtc);