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Commit 84d72f9c authored by Wei WANG's avatar Wei WANG Committed by Samuel Ortiz
Browse files

mfd: mmc: rtsx: Change default tx phase 



The default phase can meet most cards' requirement, but it is not the
optimal one. In some extreme situation, the rx phase point produced by
the following tuning process will drift quite a distance.
Before tuning UHS card, this patch will set a more proper initial tx
phase point, which is calculated from statistic data, and can achieve
a much better tx signal quality.

Signed-off-by: default avatarWei WANG <wei_wang@realsil.com.cn>
Acked-by: default avatarLee Jones <lee.jones@linaro.org>
Acked-by: default avatarChris Ball <cjb@laptop.org>
Signed-off-by: default avatarSamuel Ortiz <sameo@linux.intel.com>
parent 828fa1e6

drivers/mfd/rtl8411.c

+4 −0
Original line number Diff line number Diff line
@@ -452,6 +452,8 @@ void rtl8411_init_params(struct rtsx_pcr *pcr) 
	pcr->sd30_drive_sel_1v8 = DRIVER_TYPE_B;

	pcr->sd30_drive_sel_3v3 = DRIVER_TYPE_D;

	pcr->aspm_en = ASPM_L1_EN;

	pcr->tx_initial_phase = SET_CLOCK_PHASE(23, 7, 14);

	pcr->rx_initial_phase = SET_CLOCK_PHASE(4, 3, 10);



	pcr->ic_version = rtl8411_get_ic_version(pcr);

	pcr->sd_pull_ctl_enable_tbl = rtl8411_sd_pull_ctl_enable_tbl;
@@ -471,6 +473,8 @@ void rtl8411b_init_params(struct rtsx_pcr *pcr) 
	pcr->sd30_drive_sel_1v8 = DRIVER_TYPE_B;

	pcr->sd30_drive_sel_3v3 = DRIVER_TYPE_D;

	pcr->aspm_en = ASPM_L1_EN;

	pcr->tx_initial_phase = SET_CLOCK_PHASE(23, 7, 14);

	pcr->rx_initial_phase = SET_CLOCK_PHASE(4, 3, 10);



	pcr->ic_version = rtl8411_get_ic_version(pcr);

drivers/mfd/rts5209.c

+2 −0
Original line number Diff line number Diff line
@@ -270,6 +270,8 @@ void rts5209_init_params(struct rtsx_pcr *pcr) 
	pcr->sd30_drive_sel_1v8 = DRIVER_TYPE_B;

	pcr->sd30_drive_sel_3v3 = DRIVER_TYPE_D;

	pcr->aspm_en = ASPM_L1_EN;

	pcr->tx_initial_phase = SET_CLOCK_PHASE(27, 27, 16);

	pcr->rx_initial_phase = SET_CLOCK_PHASE(24, 6, 5);



	pcr->ic_version = rts5209_get_ic_version(pcr);

	pcr->sd_pull_ctl_enable_tbl = rts5209_sd_pull_ctl_enable_tbl;

drivers/mfd/rts5227.c

+2 −0
Original line number Diff line number Diff line
@@ -291,6 +291,8 @@ void rts5227_init_params(struct rtsx_pcr *pcr) 
	pcr->sd30_drive_sel_1v8 = CFG_DRIVER_TYPE_B;

	pcr->sd30_drive_sel_3v3 = CFG_DRIVER_TYPE_B;

	pcr->aspm_en = ASPM_L1_EN;

	pcr->tx_initial_phase = SET_CLOCK_PHASE(27, 27, 15);

	pcr->rx_initial_phase = SET_CLOCK_PHASE(30, 7, 7);



	pcr->sd_pull_ctl_enable_tbl = rts5227_sd_pull_ctl_enable_tbl;

	pcr->sd_pull_ctl_disable_tbl = rts5227_sd_pull_ctl_disable_tbl;

drivers/mfd/rts5229.c

+2 −0
Original line number Diff line number Diff line
@@ -261,6 +261,8 @@ void rts5229_init_params(struct rtsx_pcr *pcr) 
	pcr->sd30_drive_sel_1v8 = DRIVER_TYPE_B;

	pcr->sd30_drive_sel_3v3 = DRIVER_TYPE_D;

	pcr->aspm_en = ASPM_L1_EN;

	pcr->tx_initial_phase = SET_CLOCK_PHASE(27, 27, 15);

	pcr->rx_initial_phase = SET_CLOCK_PHASE(30, 6, 6);



	pcr->ic_version = rts5229_get_ic_version(pcr);

	if (pcr->ic_version == IC_VER_C) {

drivers/mfd/rts5249.c

+2 −0
Original line number Diff line number Diff line
@@ -298,6 +298,8 @@ void rts5249_init_params(struct rtsx_pcr *pcr) 
	pcr->sd30_drive_sel_1v8 = CFG_DRIVER_TYPE_C;

	pcr->sd30_drive_sel_3v3 = CFG_DRIVER_TYPE_B;

	pcr->aspm_en = ASPM_L1_EN;

	pcr->tx_initial_phase = SET_CLOCK_PHASE(1, 29, 16);

	pcr->rx_initial_phase = SET_CLOCK_PHASE(24, 6, 5);



	pcr->ic_version = rts5249_get_ic_version(pcr);

	pcr->sd_pull_ctl_enable_tbl = rts5249_sd_pull_ctl_enable_tbl;