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Commit 83e7f6e1 authored by Eric Anholt's avatar Eric Anholt
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Merge remote-tracking branch 'clk/clk-bcm2835' into bcm2835-dt-next 



The DT changes for enabling the clock driver on 2835 require that the
clock driver be present.  Stephen Boyd has said that these commits
would be stable for merging.

Signed-off-by: default avatarEric Anholt <eric@anholt.net>
parents 1cd99abb 41691b88

Documentation/devicetree/bindings/clock/brcm,bcm2835-cprman.txt

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Broadcom BCM2835 CPRMAN clocks



This binding uses the common clock binding:

    Documentation/devicetree/bindings/clock/clock-bindings.txt



The CPRMAN clock controller generates clocks in the audio power domain

of the BCM2835.  There is a level of PLLs deriving from an external

oscillator, a level of PLL dividers that produce channels off of the

few PLLs, and a level of mostly-generic clock generators sourcing from

the PLL channels.  Most other hardware components source from the

clock generators, but a few (like the ARM or HDMI) will source from

the PLL dividers directly.



Required properties:

- compatible:	Should be "brcm,bcm2835-cprman"

- #clock-cells:	Should be <1>. The permitted clock-specifier values can be

		  found in include/dt-bindings/clock/bcm2835.h

- reg:		Specifies base physical address and size of the registers

- clocks:	The external oscillator clock phandle



Example:



	clk_osc: clock@3 {

		compatible = "fixed-clock";

		reg = <3>;

		#clock-cells = <0>;

		clock-output-names = "osc";

		clock-frequency = <19200000>;

	};



	clocks: cprman@7e101000 {

		compatible = "brcm,bcm2835-cprman";

		#clock-cells = <1>;

		reg = <0x7e101000 0x2000>;

		clocks = <&clk_osc>;

	};



	i2c0: i2c@7e205000 {

		compatible = "brcm,bcm2835-i2c";

		reg = <0x7e205000 0x1000>;

		interrupts = <2 21>;

		clocks = <&clocks BCM2835_CLOCK_VPU>;

		#address-cells = <1>;

		#size-cells = <0>;

	};

drivers/clk/Makefile

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@@ -19,7 +19,6 @@ endif 
obj-$(CONFIG_MACH_ASM9260)		+= clk-asm9260.o

obj-$(CONFIG_COMMON_CLK_AXI_CLKGEN)	+= clk-axi-clkgen.o

obj-$(CONFIG_ARCH_AXXIA)		+= clk-axm5516.o

obj-$(CONFIG_ARCH_BCM2835)		+= clk-bcm2835.o

obj-$(CONFIG_COMMON_CLK_CDCE706)	+= clk-cdce706.o

obj-$(CONFIG_ARCH_CLPS711X)		+= clk-clps711x.o

obj-$(CONFIG_ARCH_EFM32)		+= clk-efm32gg.o

drivers/clk/bcm/Makefile

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@@ -3,4 +3,5 @@ obj-$(CONFIG_CLK_BCM_KONA) += clk-kona-setup.o 
obj-$(CONFIG_CLK_BCM_KONA)	+= clk-bcm281xx.o

obj-$(CONFIG_CLK_BCM_KONA)	+= clk-bcm21664.o

obj-$(CONFIG_COMMON_CLK_IPROC)	+= clk-iproc-armpll.o clk-iproc-pll.o clk-iproc-asiu.o

obj-$(CONFIG_ARCH_BCM2835)	+= clk-bcm2835.o

obj-$(CONFIG_ARCH_BCM_CYGNUS)	+= clk-cygnus.o

drivers/clk/bcm/clk-bcm2835.c

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drivers/clk/clk-bcm2835.c

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/*

 * Copyright (C) 2010 Broadcom

 * Copyright (C) 2012 Stephen Warren

 *

 * This program is free software; you can redistribute it and/or modify

 * it under the terms of the GNU General Public License as published by

 * the Free Software Foundation; either version 2 of the License, or

 * (at your option) any later version.

 *

 * This program is distributed in the hope that it will be useful,

 * but WITHOUT ANY WARRANTY; without even the implied warranty of

 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the

 * GNU General Public License for more details.

 *

 * You should have received a copy of the GNU General Public License

 * along with this program; if not, write to the Free Software

 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA

 */



#include <linux/clk-provider.h>

#include <linux/clkdev.h>

#include <linux/clk/bcm2835.h>

#include <linux/of.h>



/*

 * These are fixed clocks. They're probably not all root clocks and it may

 * be possible to turn them on and off but until this is mapped out better

 * it's the only way they can be used.

 */

void __init bcm2835_init_clocks(void)

{

	struct clk *clk;

	int ret;



	clk = clk_register_fixed_rate(NULL, "apb_pclk", NULL, CLK_IS_ROOT,

					126000000);

	if (IS_ERR(clk))

		pr_err("apb_pclk not registered\n");



	clk = clk_register_fixed_rate(NULL, "uart0_pclk", NULL, CLK_IS_ROOT,

					3000000);

	if (IS_ERR(clk))

		pr_err("uart0_pclk not registered\n");

	ret = clk_register_clkdev(clk, NULL, "20201000.uart");

	if (ret)

		pr_err("uart0_pclk alias not registered\n");



	clk = clk_register_fixed_rate(NULL, "uart1_pclk", NULL, CLK_IS_ROOT,

					125000000);

	if (IS_ERR(clk))

		pr_err("uart1_pclk not registered\n");

	ret = clk_register_clkdev(clk, NULL, "20215000.uart");

	if (ret)

		pr_err("uart1_pclk alias not registered\n");

}