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Commit 8379e482 authored by Seung-Woo Kim's avatar Seung-Woo Kim Committed by Inki Dae
Browse files

drm/exynos: fixed wrong pageflip finish event for interlace mode 



Pageflip finish event for interlace mode has bug on checking top
field vsync because of comparing between dma address converted
by start coordinates and non-converted dma address.

Signed-off-by: default avatarSeung-Woo Kim <sw0312.kim@samsung.com>
Signed-off-by: default avatarKyungmin Park <kyungmin.park@samsung.com>
Signed-off-by: default avatarInki Dae <inki.dae@samsung.com>
parent ab27af85

drivers/gpu/drm/exynos/exynos_mixer.c

+7 −5
Original line number Original line Diff line number Diff line
@@ -886,7 +886,7 @@ static irqreturn_t mixer_irq_handler(int irq, void *arg) 
	struct exynos_drm_hdmi_context *drm_hdmi_ctx = arg;

	struct exynos_drm_hdmi_context *drm_hdmi_ctx = arg;

	struct mixer_context *ctx = drm_hdmi_ctx->ctx;

	struct mixer_context *ctx = drm_hdmi_ctx->ctx;

	struct mixer_resources *res = &ctx->mixer_res;

	struct mixer_resources *res = &ctx->mixer_res;

	u32 val, val_base;

	u32 val, base, shadow;





	spin_lock(&res->reg_slock);

	spin_lock(&res->reg_slock);
@@ -897,12 +897,14 @@ static irqreturn_t mixer_irq_handler(int irq, void *arg) 
	if (val & MXR_INT_STATUS_VSYNC) {

	if (val & MXR_INT_STATUS_VSYNC) {

		/* interlace scan need to check shadow register */

		/* interlace scan need to check shadow register */

		if (ctx->interlace) {

		if (ctx->interlace) {

			val_base = mixer_reg_read(res, MXR_GRAPHIC_BASE_S(0));

			base = mixer_reg_read(res, MXR_GRAPHIC_BASE(0));

			if (ctx->win_data[0].dma_addr != val_base)

			shadow = mixer_reg_read(res, MXR_GRAPHIC_BASE_S(0));

			if (base != shadow)

				goto out;

				goto out;





			val_base = mixer_reg_read(res, MXR_GRAPHIC_BASE_S(1));

			base = mixer_reg_read(res, MXR_GRAPHIC_BASE(1));

			if (ctx->win_data[1].dma_addr != val_base)

			shadow = mixer_reg_read(res, MXR_GRAPHIC_BASE_S(1));

			if (base != shadow)

				goto out;

				goto out;

		}

		}