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Commit 8320857b authored by Olof Johansson's avatar Olof Johansson
Browse files

Merge tag 'v3.15-rc6' into next/defconfig 

Linux 3.15-rc6
parents 263c08af 4b660a7f

Documentation/ABI/testing/sysfs-bus-pci

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@@ -117,7 +117,7 @@ Description: 


What:		/sys/bus/pci/devices/.../vpd

Date:		February 2008

Contact:	Ben Hutchings <bhutchings@solarflare.com>

Contact:	Ben Hutchings <bwh@kernel.org>

Description:

		A file named vpd in a device directory will be a

		binary file containing the Vital Product Data for the

Documentation/devicetree/bindings/clock/at91-clock.txt

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@@ -62,7 +62,7 @@ Required properties for PMC node: 
- interrupt-controller : tell that the PMC is an interrupt controller.

- #interrupt-cells : must be set to 1. The first cell encodes the interrupt id,

	and reflect the bit position in the PMC_ER/DR/SR registers.

	You can use the dt macros defined in dt-bindings/clk/at91.h.

	You can use the dt macros defined in dt-bindings/clock/at91.h.

	0 (AT91_PMC_MOSCS) -> main oscillator ready

	1 (AT91_PMC_LOCKA) -> PLL A ready

	2 (AT91_PMC_LOCKB) -> PLL B ready

Documentation/devicetree/bindings/clock/renesas,cpg-mstp-clocks.txt

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@@ -43,7 +43,7 @@ Example 
		clock-output-names =

			"tpu0", "mmcif1", "sdhi3", "sdhi2",

			 "sdhi1", "sdhi0", "mmcif0";

		renesas,clock-indices = <

		clock-indices = <

			R8A7790_CLK_TPU0 R8A7790_CLK_MMCIF1 R8A7790_CLK_SDHI3

			R8A7790_CLK_SDHI2 R8A7790_CLK_SDHI1 R8A7790_CLK_SDHI0

			R8A7790_CLK_MMCIF0

Documentation/devicetree/bindings/dma/ti-edma.txt

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@@ -29,6 +29,6 @@ edma: edma@49000000 { 
	dma-channels = <64>;

	ti,edma-regions = <4>;

	ti,edma-slots = <256>;

	ti,edma-xbar-event-map = <1 12

	ti,edma-xbar-event-map = /bits/ 16 <1 12

					    2 13>;

};

Documentation/devicetree/bindings/net/arc_emac.txt

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@@ -4,11 +4,15 @@ Required properties: 
- compatible: Should be "snps,arc-emac"

- reg: Address and length of the register set for the device

- interrupts: Should contain the EMAC interrupts

- clock-frequency: CPU frequency. It is needed to calculate and set polling

period of EMAC.

- max-speed: see ethernet.txt file in the same directory.

- phy: see ethernet.txt file in the same directory.



Clock handling:

The clock frequency is needed to calculate and set polling period of EMAC.

It must be provided by one of:

- clock-frequency: CPU frequency.

- clocks: reference to the clock supplying the EMAC.



Child nodes of the driver are the individual PHY devices connected to the

MDIO bus. They must have a "reg" property given the PHY address on the MDIO bus.
@@ -19,7 +23,11 @@ Examples: 
		reg = <0xc0fc2000 0x3c>;

		interrupts = <6>;

		mac-address = [ 00 11 22 33 44 55 ];



		clock-frequency = <80000000>;

		/* or */

		clocks = <&emac_clock>;



		max-speed = <100>;

		phy = <&phy0>;