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Commit 82910ac6 authored by Jani Nikula's avatar Jani Nikula Committed by Daniel Vetter
Browse files

drm/i915: make pipe/port based audio valid accessors easier to use 



Signed-off-by: default avatarJani Nikula <jani.nikula@intel.com>
Reviewed-by: default avatarRodrigo Vivi <rodrigo.vivi@intel.com>
Signed-off-by: default avatarDaniel Vetter <daniel.vetter@ffwll.ch>
parent d5ee08de

drivers/gpu/drm/i915/i915_reg.h

+6 −14
Original line number Original line Diff line number Diff line
@@ -6102,8 +6102,8 @@ enum punit_power_well { 
#define   IBX_ELD_ADDRESS_MASK		(0x1f << 5)

#define   IBX_ELD_ADDRESS_MASK		(0x1f << 5)

#define   IBX_ELD_ACK			(1 << 4)

#define   IBX_ELD_ACK			(1 << 4)

#define IBX_AUD_CNTL_ST2		0xE20C0

#define IBX_AUD_CNTL_ST2		0xE20C0

#define   IBX_ELD_VALIDB		(1 << 0)

#define   IBX_CP_READY(port)		((1 << 1) << (((port) - 1) * 4))

#define   IBX_CP_READYB			(1 << 1)

#define   IBX_ELD_VALID(port)		((1 << 0) << (((port) - 1) * 4))





#define _CPT_HDMIW_HDMIEDID_A		0xE5050

#define _CPT_HDMIW_HDMIEDID_A		0xE5050

#define _CPT_HDMIW_HDMIEDID_B		0xE5150

#define _CPT_HDMIW_HDMIEDID_B		0xE5150
@@ -6206,18 +6206,10 @@ enum punit_power_well { 




#define HSW_AUD_PIPE_CONV_CFG		0x6507c

#define HSW_AUD_PIPE_CONV_CFG		0x6507c

#define HSW_AUD_PIN_ELD_CP_VLD		0x650c0

#define HSW_AUD_PIN_ELD_CP_VLD		0x650c0

#define   AUDIO_INACTIVE_C		(1<<11)

#define   AUDIO_INACTIVE(trans)		((1 << 3) << ((trans) * 4))

#define   AUDIO_INACTIVE_B		(1<<7)

#define   AUDIO_OUTPUT_ENABLE(trans)	((1 << 2) << ((trans) * 4))

#define   AUDIO_INACTIVE_A		(1<<3)

#define   AUDIO_CP_READY(trans)		((1 << 1) << ((trans) * 4))

#define   AUDIO_OUTPUT_ENABLE_A		(1<<2)

#define   AUDIO_ELD_VALID(trans)	((1 << 0) << ((trans) * 4))

#define   AUDIO_OUTPUT_ENABLE_B		(1<<6)

#define   AUDIO_OUTPUT_ENABLE_C		(1<<10)

#define   AUDIO_ELD_VALID_A		(1<<0)

#define   AUDIO_ELD_VALID_B		(1<<4)

#define   AUDIO_ELD_VALID_C		(1<<8)

#define   AUDIO_CP_READY_A		(1<<1)

#define   AUDIO_CP_READY_B		(1<<5)

#define   AUDIO_CP_READY_C		(1<<9)





/* HSW Power Wells */

/* HSW Power Wells */

#define HSW_PWR_WELL_BIOS			0x45400 /* CTL1 */

#define HSW_PWR_WELL_BIOS			0x45400 /* CTL1 */

drivers/gpu/drm/i915/intel_audio.c

+10 −12
Original line number Original line Diff line number Diff line
@@ -172,7 +172,7 @@ static void hsw_audio_codec_disable(struct intel_encoder *encoder) 




	/* Invalidate ELD */

	/* Invalidate ELD */

	tmp = I915_READ(HSW_AUD_PIN_ELD_CP_VLD);

	tmp = I915_READ(HSW_AUD_PIN_ELD_CP_VLD);

	tmp &= ~(AUDIO_ELD_VALID_A << (pipe * 4));

	tmp &= ~AUDIO_ELD_VALID(pipe);

	I915_WRITE(HSW_AUD_PIN_ELD_CP_VLD, tmp);

	I915_WRITE(HSW_AUD_PIN_ELD_CP_VLD, tmp);

}

}
@@ -192,8 +192,8 @@ static void hsw_audio_codec_enable(struct drm_connector *connector, 




	/* Enable audio presence detect, invalidate ELD */

	/* Enable audio presence detect, invalidate ELD */

	tmp = I915_READ(HSW_AUD_PIN_ELD_CP_VLD);

	tmp = I915_READ(HSW_AUD_PIN_ELD_CP_VLD);

	tmp |= AUDIO_OUTPUT_ENABLE_A << (pipe * 4);

	tmp |= AUDIO_OUTPUT_ENABLE(pipe);

	tmp &= ~(AUDIO_ELD_VALID_A << (pipe * 4));

	tmp &= ~AUDIO_ELD_VALID(pipe);

	I915_WRITE(HSW_AUD_PIN_ELD_CP_VLD, tmp);

	I915_WRITE(HSW_AUD_PIN_ELD_CP_VLD, tmp);





	/*

	/*
@@ -215,7 +215,7 @@ static void hsw_audio_codec_enable(struct drm_connector *connector, 




	/* ELD valid */

	/* ELD valid */

	tmp = I915_READ(HSW_AUD_PIN_ELD_CP_VLD);

	tmp = I915_READ(HSW_AUD_PIN_ELD_CP_VLD);

	tmp |= AUDIO_ELD_VALID_A << (pipe * 4);

	tmp |= AUDIO_ELD_VALID(pipe);

	I915_WRITE(HSW_AUD_PIN_ELD_CP_VLD, tmp);

	I915_WRITE(HSW_AUD_PIN_ELD_CP_VLD, tmp);





	/* Enable timestamps */

	/* Enable timestamps */
@@ -267,11 +267,10 @@ static void ilk_audio_codec_disable(struct intel_encoder *encoder) 
	I915_WRITE(aud_config, tmp);

	I915_WRITE(aud_config, tmp);





	if (WARN_ON(!port)) {

	if (WARN_ON(!port)) {

		eldv = IBX_ELD_VALIDB;

		eldv = IBX_ELD_VALID(PORT_B) | IBX_ELD_VALID(PORT_C) |

		eldv |= IBX_ELD_VALIDB << 4;

			IBX_ELD_VALID(PORT_D);

		eldv |= IBX_ELD_VALIDB << 8;

	} else {

	} else {

		eldv = IBX_ELD_VALIDB << ((port - 1) * 4);

		eldv = IBX_ELD_VALID(port);

	}

	}





	/* Invalidate ELD */

	/* Invalidate ELD */
@@ -327,11 +326,10 @@ static void ilk_audio_codec_enable(struct drm_connector *connector, 
	}

	}





	if (WARN_ON(!port)) {

	if (WARN_ON(!port)) {

		eldv = IBX_ELD_VALIDB;

		eldv = IBX_ELD_VALID(PORT_B) | IBX_ELD_VALID(PORT_C) |

		eldv |= IBX_ELD_VALIDB << 4;

			IBX_ELD_VALID(PORT_D);

		eldv |= IBX_ELD_VALIDB << 8;

	} else {

	} else {

		eldv = IBX_ELD_VALIDB << ((port - 1) * 4);

		eldv = IBX_ELD_VALID(port);

	}

	}





	/* Invalidate ELD */

	/* Invalidate ELD */

drivers/gpu/drm/i915/intel_ddi.c

+1 −1
Original line number Original line Diff line number Diff line
@@ -1523,7 +1523,7 @@ void intel_ddi_get_config(struct intel_encoder *encoder, 




	if (intel_display_power_is_enabled(dev_priv, POWER_DOMAIN_AUDIO)) {

	if (intel_display_power_is_enabled(dev_priv, POWER_DOMAIN_AUDIO)) {

		temp = I915_READ(HSW_AUD_PIN_ELD_CP_VLD);

		temp = I915_READ(HSW_AUD_PIN_ELD_CP_VLD);

		if (temp & (AUDIO_OUTPUT_ENABLE_A << (intel_crtc->pipe * 4)))

		if (temp & AUDIO_OUTPUT_ENABLE(intel_crtc->pipe))

			pipe_config->has_audio = true;

			pipe_config->has_audio = true;

	}

	}