Donate to e Foundation | Murena handsets with /e/OS | Own a part of Murena! Learn more

Commit 82872e42 authored by Yakir Yang's avatar Yakir Yang
Browse files

drm/rockchip: analogix_dp: add rk3399 eDP support 



RK3399 and RK3288 shared the same eDP IP controller, only some light
difference with VOP configure and GRF configure.

Signed-off-by: default avatarYakir Yang <ykk@rock-chips.com>
Acked-by: default avatarMark Yao <mark.yao@rock-chips.com>
Reviewed-by: default avatarTomasz Figa <tomasz.figa@chromium.com>
Reviewed-by: default avatarSean Paul <seanpaul@chromium.org>
parent 7bdc0720

Documentation/devicetree/bindings/display/bridge/analogix_dp.txt

+1 −0
Original line number Diff line number Diff line
@@ -5,6 +5,7 @@ Required properties for dp-controller: 
		platform specific such as:

		 * "samsung,exynos5-dp"

		 * "rockchip,rk3288-dp"

		 * "rockchip,rk3399-edp"

	-reg:

		physical base address of the controller and length

		of memory mapped region.

Documentation/devicetree/bindings/display/rockchip/analogix_dp-rockchip.txt

+2 −1
Original line number Diff line number Diff line
@@ -2,7 +2,8 @@ Rockchip RK3288 specific extensions to the Analogix Display Port 
================================



Required properties:

- compatible: "rockchip,rk3288-edp";

- compatible: "rockchip,rk3288-edp",

	      "rockchip,rk3399-edp";



- reg: physical base address of the controller and length

drivers/gpu/drm/bridge/analogix/analogix_dp_core.c

+1 −0
Original line number Diff line number Diff line
@@ -1208,6 +1208,7 @@ static int analogix_dp_dt_parse_pdata(struct analogix_dp_device *dp) 


	switch (dp->plat_data->dev_type) {

	case RK3288_DP:

	case RK3399_EDP:

		/*

		 * Like Rk3288 DisplayPort TRM indicate that "Main link

		 * containing 4 physical lanes of 2.7/1.62 Gbps/lane".

drivers/gpu/drm/rockchip/analogix_dp-rockchip.c

+23 −0
Original line number Diff line number Diff line
@@ -36,6 +36,8 @@ 


#define RK3288_GRF_SOC_CON6		0x25c

#define RK3288_EDP_LCDC_SEL		BIT(5)

#define RK3399_GRF_SOC_CON20		0x6250

#define RK3399_EDP_LCDC_SEL		BIT(5)



#define HIWORD_UPDATE(val, mask)	(val | (mask) << 16)
@@ -159,6 +161,8 @@ rockchip_dp_drm_encoder_atomic_check(struct drm_encoder *encoder, 
				      struct drm_connector_state *conn_state)

{

	struct rockchip_crtc_state *s = to_rockchip_crtc_state(crtc_state);

	struct rockchip_dp_device *dp = to_dp(encoder);

	int ret;



	/*

	 * FIXME(Yakir): driver should configure the CRTC output video
@@ -173,8 +177,19 @@ rockchip_dp_drm_encoder_atomic_check(struct drm_encoder *encoder, 
	 * But if I configure CTRC to RGBaaa, and eDP driver still keep

	 * RGB666 input video mode, then screen would works prefect.

	 */



	s->output_mode = ROCKCHIP_OUT_MODE_AAAA;

	s->output_type = DRM_MODE_CONNECTOR_eDP;

	if (dp->data->chip_type == RK3399_EDP) {

		/*

		 * For RK3399, VOP Lit must code the out mode to RGB888,

		 * VOP Big must code the out mode to RGB10.

		 */

		ret = drm_of_encoder_active_endpoint_id(dp->dev->of_node,

							encoder);

		if (ret > 0)

			s->output_mode = ROCKCHIP_OUT_MODE_P888;

	}



	return 0;

}
@@ -378,6 +393,13 @@ static const struct dev_pm_ops rockchip_dp_pm_ops = { 
#endif

};



static const struct rockchip_dp_chip_data rk3399_edp = {

	.lcdsel_grf_reg = RK3399_GRF_SOC_CON20,

	.lcdsel_big = HIWORD_UPDATE(0, RK3399_EDP_LCDC_SEL),

	.lcdsel_lit = HIWORD_UPDATE(RK3399_EDP_LCDC_SEL, RK3399_EDP_LCDC_SEL),

	.chip_type = RK3399_EDP,

};



static const struct rockchip_dp_chip_data rk3288_dp = {

	.lcdsel_grf_reg = RK3288_GRF_SOC_CON6,

	.lcdsel_big = HIWORD_UPDATE(0, RK3288_EDP_LCDC_SEL),
@@ -387,6 +409,7 @@ static const struct rockchip_dp_chip_data rk3288_dp = { 


static const struct of_device_id rockchip_dp_dt_ids[] = {

	{.compatible = "rockchip,rk3288-dp", .data = &rk3288_dp },

	{.compatible = "rockchip,rk3399-edp", .data = &rk3399_edp },

	{}

};

MODULE_DEVICE_TABLE(of, rockchip_dp_dt_ids);

include/drm/bridge/analogix_dp.h

+2 −1
Original line number Diff line number Diff line
@@ -16,11 +16,12 @@ 
enum analogix_dp_devtype {

	EXYNOS_DP,

	RK3288_DP,

	RK3399_EDP,

};



static inline bool is_rockchip(enum analogix_dp_devtype type)

{

	return type == RK3288_DP;

	return type == RK3288_DP || type == RK3399_EDP;

}



struct analogix_dp_plat_data {